Struct GpuDevice 

pub struct GpuDevice {
    pub device: Device,
    pub queue: Queue,
}

GPU device manager

Fields

device: Device

queue: Queue

Implementations

impl GpuDevice

pub fn relu(&self, input: &[f32], result: &mut [f32]) -> Result<(), String>

Execute ReLU activation on GPU: result[i] = max(0, input[i]) (sync, native only)

pub async fn relu_async( &self, input: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute ReLU activation on GPU (async, works on all platforms)

pub fn leaky_relu( &self, input: &[f32], result: &mut [f32], negative_slope: f32, ) -> Result<(), String>

Execute leaky ReLU activation on GPU (sync, native only)

pub async fn leaky_relu_async( &self, input: &[f32], result: &mut [f32], negative_slope: f32, ) -> Result<(), String>

Execute leaky ReLU activation on GPU (async, works on all platforms)

pub fn elu( &self, input: &[f32], result: &mut [f32], alpha: f32, ) -> Result<(), String>

Execute ELU activation on GPU (sync, native only)

pub async fn elu_async( &self, input: &[f32], result: &mut [f32], alpha: f32, ) -> Result<(), String>

Execute ELU activation on GPU (async, works on all platforms)

pub fn sigmoid(&self, input: &[f32], result: &mut [f32]) -> Result<(), String>

Execute sigmoid activation on GPU (sync, native only)

pub async fn sigmoid_async( &self, input: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute sigmoid activation on GPU (async, works on all platforms)

pub fn tanh(&self, input: &[f32], result: &mut [f32]) -> Result<(), String>

Execute tanh activation on GPU (sync, native only)

pub async fn tanh_async( &self, input: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute tanh activation on GPU (async, works on all platforms)

pub fn swish(&self, input: &[f32], result: &mut [f32]) -> Result<(), String>

Execute swish activation on GPU (sync, native only)

pub async fn swish_async( &self, input: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute swish activation on GPU (async, works on all platforms)

pub fn gelu(&self, input: &[f32], result: &mut [f32]) -> Result<(), String>

Execute GELU activation on GPU (sync, native only)

pub async fn gelu_async( &self, input: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute GELU activation on GPU (async, works on all platforms)

pub fn clip( &self, input: &[f32], result: &mut [f32], min_val: f32, max_val: f32, ) -> Result<(), String>

Execute clip (clamp) operation on GPU (sync, native only)

pub async fn clip_async( &self, input: &[f32], result: &mut [f32], min_val: f32, max_val: f32, ) -> Result<(), String>

Execute clip (clamp) operation on GPU (async, works on all platforms)

pub fn softmax(&self, input: &[f32], result: &mut [f32]) -> Result<(), String>

Execute softmax on GPU (sync, native only)

Multi-pass implementation:

1. Find max value (parallel reduction)
2. Compute exp(x - max) (element-wise)
3. Sum exp values (parallel reduction)
4. Normalize by sum (element-wise)

pub async fn softmax_async( &self, input: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute softmax on GPU (async, works on all platforms)

pub fn log_softmax( &self, input: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute log_softmax on GPU (sync, native only)

Multi-pass implementation:

1. Find max value (parallel reduction)
2. Compute exp(x - max) (element-wise)
3. Sum exp values (parallel reduction)
4. Compute log_softmax (element-wise)

pub async fn log_softmax_async( &self, input: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute log_softmax on GPU (async, works on all platforms)

impl GpuDevice

pub fn silu_backward( &self, input: &[f32], grad_output: &[f32], grad_input: &mut [f32], ) -> Result<(), String>

SiLU backward on GPU: grad_input[i] = grad_output[i] * silu’(input[i])

Contract (FALSIFY-WGPU-001)

• Precondition: input.len() == grad_output.len() == grad_input.len()
• Postcondition: max|grad_input_gpu - grad_input_cpu| < 1e-4

pub async fn silu_backward_async( &self, input: &[f32], grad_output: &[f32], grad_input: &mut [f32], ) -> Result<(), String>

SiLU backward on GPU (async)

pub fn gemm_backward_a( &self, grad_c: &[f32], b: &[f32], grad_a: &mut [f32], m: u32, k: u32, n: u32, ) -> Result<(), String>

GEMM backward for A: grad_a[M,K] = grad_c[M,N] @ B^T[N,K]

Contract (FALSIFY-WGPU-001)

• Precondition: grad_c.len() == mn, b.len() == kn, grad_a.len() == m*k
• Postcondition: max|grad_a_gpu - grad_a_cpu| < 1e-4

pub async fn gemm_backward_a_async( &self, grad_c: &[f32], b: &[f32], grad_a: &mut [f32], m: u32, k: u32, n: u32, ) -> Result<(), String>

GEMM backward for A (async): grad_a = grad_c @ B^T

pub fn gemm_backward_b( &self, a: &[f32], grad_c: &[f32], grad_b: &mut [f32], m: u32, k: u32, n: u32, ) -> Result<(), String>

GEMM backward for B: grad_b[K,N] = A^T[K,M] @ grad_c[M,N]

pub async fn gemm_backward_b_async( &self, a: &[f32], grad_c: &[f32], grad_b: &mut [f32], m: u32, k: u32, n: u32, ) -> Result<(), String>

GEMM backward for B (async): grad_b = A^T @ grad_c

pub fn rope_backward( &self, grad_output: &[f32], grad_input: &mut [f32], num_heads: u32, head_dim: u32, seq_len: u32, theta: f32, ) -> Result<(), String>

RoPE backward on GPU: transpose rotation (negated sin)

Contract (FALSIFY-WGPU-001)

pub async fn rope_backward_async( &self, grad_output: &[f32], grad_input: &mut [f32], num_heads: u32, head_dim: u32, seq_len: u32, theta: f32, ) -> Result<(), String>

RoPE backward (async)

pub fn adamw_step( &self, params: &mut [f32], grads: &[f32], m: &mut [f32], v: &mut [f32], lr: f32, beta1: f32, beta2: f32, eps: f32, weight_decay: f32, step: u32, ) -> Result<(), String>

AdamW optimizer step on GPU

pub async fn adamw_step_async( &self, params: &mut [f32], grads: &[f32], m: &mut [f32], v: &mut [f32], lr: f32, beta1: f32, beta2: f32, eps: f32, weight_decay: f32, step: u32, ) -> Result<(), String>

AdamW step (async)

pub fn rmsnorm_backward( &self, input: &[f32], gamma: &[f32], grad_output: &[f32], grad_input: &mut [f32], grad_gamma: &mut [f32], num_rows: u32, hidden_dim: u32, eps: f32, ) -> Result<(), String>

RMSNorm backward on GPU

Computes grad_input and accumulates grad_gamma via atomic CAS. One workgroup (256 threads) per row.

Contract (FALSIFY-WGPU-001)

pub async fn rmsnorm_backward_async( &self, input: &[f32], gamma: &[f32], grad_output: &[f32], grad_input: &mut [f32], grad_gamma: &mut [f32], num_rows: u32, hidden_dim: u32, eps: f32, ) -> Result<(), String>

RMSNorm backward (async)

pub fn nf4_dequant( &self, packed: &[u32], scales: &[f32], output: &mut [f32], n: u32, block_size: u32, ) -> Result<(), String>

NF4 dequantization on GPU

Converts 4-bit NormalFloat packed weights to fp32 using codebook lookup.

Contract (FALSIFY-WGPU-003)

pub async fn nf4_dequant_async( &self, packed: &[u32], scales: &[f32], output: &mut [f32], n: u32, block_size: u32, ) -> Result<(), String>

NF4 dequant (async)

impl GpuDevice

pub fn symmetric_eigen( &self, matrix: &[f32], n: usize, ) -> Result<(Vec<f32>, Vec<f32>), String>

Execute symmetric eigendecomposition on GPU (sync, native only)

Computes eigenvalues and eigenvectors using Jacobi algorithm with GPU-accelerated Givens rotations. Returns (eigenvalues, eigenvector_data) where eigenvector_data is in row-major format.

pub async fn symmetric_eigen_async( &self, matrix: &[f32], n: usize, ) -> Result<(Vec<f32>, Vec<f32>), String>

Execute symmetric eigendecomposition on GPU (async, works on all platforms)

Computes eigenvalues and eigenvectors using Jacobi algorithm with GPU-accelerated Givens rotations.

impl GpuDevice

pub fn convolve2d( &self, input: &[f32], kernel: &[f32], result: &mut [f32], input_rows: usize, input_cols: usize, kernel_rows: usize, kernel_cols: usize, ) -> Result<(), String>

Perform 2D convolution on GPU (sync, native only)

Arguments

• input - Input image (row-major)
• kernel - Convolution kernel (row-major)
• result - Output buffer (row-major)
• input_rows - Number of rows in input
• input_cols - Number of columns in input
• kernel_rows - Number of rows in kernel
• kernel_cols - Number of columns in kernel

Output dimensions: (input_rows - kernel_rows + 1) x (input_cols - kernel_cols + 1)

pub async fn convolve2d_async( &self, input: &[f32], kernel: &[f32], result: &mut [f32], input_rows: usize, input_cols: usize, kernel_rows: usize, kernel_cols: usize, ) -> Result<(), String>

Perform 2D convolution on GPU (async, works on all platforms)

impl GpuDevice

pub fn dot(&self, a: &[f32], b: &[f32]) -> Result<f32, String>

Execute dot product on GPU (sync, native only)

pub async fn dot_async(&self, a: &[f32], b: &[f32]) -> Result<f32, String>

Execute dot product on GPU (async, works on all platforms)

impl GpuDevice

pub fn matmul( &self, a: &[f32], b: &[f32], result: &mut [f32], m: usize, k: usize, n: usize, ) -> Result<(), String>

Execute matrix multiplication on GPU (sync, native only)

pub async fn matmul_async( &self, a: &[f32], b: &[f32], result: &mut [f32], m: usize, k: usize, n: usize, ) -> Result<(), String>

Execute matrix multiplication on GPU (async, works on all platforms)

impl GpuDevice

pub fn vec_add( &self, a: &[f32], b: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute vector addition on GPU: c = a + b (sync, native only)

pub async fn vec_add_async( &self, a: &[f32], b: &[f32], result: &mut [f32], ) -> Result<(), String>

Execute vector addition on GPU: c = a + b (async, works on all platforms)

impl GpuDevice

pub fn tiled_sum_2d( &self, data: &[f32], width: usize, height: usize, ) -> Result<f32, String>

2D Tiled Sum Reduction on GPU (sync, native only)

Uses 16x16 workgroups for efficient parallel reduction with optimal memory coalescing. GPU version of tiled_sum_2d.

Arguments

• data - Input 2D data in row-major order
• width - Number of columns
• height - Number of rows

Returns

Sum of all elements

pub async fn tiled_sum_2d_async( &self, data: &[f32], width: usize, height: usize, ) -> Result<f32, String>

2D Tiled Sum Reduction on GPU (async, works on all platforms)

pub fn tiled_max_2d( &self, data: &[f32], width: usize, height: usize, ) -> Result<f32, String>

2D Tiled Max Reduction on GPU (sync, native only)

Uses 16x16 workgroups for efficient parallel max reduction. GPU version of tiled_max_2d.

pub async fn tiled_max_2d_async( &self, data: &[f32], width: usize, height: usize, ) -> Result<f32, String>

2D Tiled Max Reduction on GPU (async, works on all platforms)

pub fn tiled_min_2d( &self, data: &[f32], width: usize, height: usize, ) -> Result<f32, String>

2D Tiled Min Reduction on GPU (sync, native only)

Uses 16x16 workgroups for efficient parallel min reduction. GPU version of tiled_min_2d.

pub async fn tiled_min_2d_async( &self, data: &[f32], width: usize, height: usize, ) -> Result<f32, String>

2D Tiled Min Reduction on GPU (async, works on all platforms)

impl GpuDevice

pub fn new() -> Result<Self, String>

Initialize GPU device (sync, native only)

pub async fn new_async() -> Result<Self, String>

Initialize GPU device (async, works on all platforms)

pub fn new_with_adapter_index(index: u32) -> Result<Self, String>

Initialize GPU device with a specific adapter index (sync, native only)

Use this to select a specific GPU when multiple are available. Adapter indices correspond to Instance::enumerate_adapters() ordering.

pub async fn new_with_adapter_index_async(index: u32) -> Result<Self, String>

Initialize GPU device with a specific adapter index (async, all platforms)

Use this to select a specific GPU when multiple are available. Adapter indices correspond to Instance::enumerate_adapters() ordering.

pub fn list_adapters() -> Vec<(u32, String, String)>

List all available GPU adapters (sync, native only)

Returns a list of (index, name, backend) tuples for each adapter.

pub async fn list_adapters_async() -> Vec<(u32, String, String)>

List all available GPU adapters (async, all platforms)

pub fn is_available() -> bool

Check if GPU is available (sync, native only)

pub async fn is_available_async() -> bool

Check if GPU is available (async, works on all platforms)

Trait Implementations

impl Clone for GpuDevice

fn clone(&self) -> GpuDevice

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.