Enum ambiq_apollo1_pac::uart::cr::CLKSEL_A

#[repr(u8)]
pub enum CLKSEL_A {
    NOCLK,
    _24MHZ,
    _12MHZ,
    _6MHZ,
    _3MHZ,
}

This bitfield is the UART clock select.

Value on reset: 0

Variants

NOCLK

0: No UART clock. This is the low power default.

_24MHZ

1: 24 MHz clock. Must be used if CLKGEN CORESEL=0.

_12MHZ

2: 12 MHz clock. Must be used if CLKGEN CORESEL=1. Note that CORESEL=1 is unsupported by the IO Master.

_6MHZ

3: 6 MHz clock. Must be used if CLKGEN CORESEL=2, 3, or 4. Note that CORESEL=2 is unsupported.

_3MHZ

4: 3 MHz clock. Must be used if CLKGEN CORESEL=5, 6, or 7.

Trait Implementations

impl Clone for CLKSEL_A

fn clone(&self) -> CLKSEL_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for CLKSEL_A

impl Debug for CLKSEL_A

fn fmt(&self, f: &mut Formatter) -> Result

Formats the value using the given formatter.

impl From<CLKSEL_A> for u8

fn from(variant: CLKSEL_A) -> Self

Performs the conversion.

impl PartialEq<CLKSEL_A> for CLKSEL_A

fn eq(&self, other: &CLKSEL_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use] fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl StructuralPartialEq for CLKSEL_A