[−][src]Struct ambiq_apollo1_pac::ctimer::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub tmr0: TMR0,
    pub cmpra0: CMPRA0,
    pub cmprb0: CMPRB0,
    pub ctrl0: CTRL0,
    pub tmr1: TMR1,
    pub cmpra1: CMPRA1,
    pub cmprb1: CMPRB1,
    pub ctrl1: CTRL1,
    pub tmr2: TMR2,
    pub cmpra2: CMPRA2,
    pub cmprb2: CMPRB2,
    pub ctrl2: CTRL2,
    pub tmr3: TMR3,
    pub cmpra3: CMPRA3,
    pub cmprb3: CMPRB3,
    pub ctrl3: CTRL3,
    pub inten: INTEN,
    pub intstat: INTSTAT,
    pub intclr: INTCLR,
    pub intset: INTSET,
    // some fields omitted
}

Register block

Fields

tmr0: TMR0

0x00 - Counter/Timer Register

cmpra0: CMPRA0

0x04 - Counter/Timer A0 Compare Registers

cmprb0: CMPRB0

0x08 - Counter/Timer B0 Compare Registers

ctrl0: CTRL0

0x0c - Counter/Timer Control

tmr1: TMR1

0x10 - Counter/Timer Register

cmpra1: CMPRA1

0x14 - Counter/Timer A1 Compare Registers

cmprb1: CMPRB1

0x18 - Counter/Timer B1 Compare Registers

ctrl1: CTRL1

0x1c - Counter/Timer Control

tmr2: TMR2

0x20 - Counter/Timer Register

cmpra2: CMPRA2

0x24 - Counter/Timer A2 Compare Registers

cmprb2: CMPRB2

0x28 - Counter/Timer B2 Compare Registers

ctrl2: CTRL2

0x2c - Counter/Timer Control

tmr3: TMR3

0x30 - Counter/Timer Register

cmpra3: CMPRA3

0x34 - Counter/Timer A3 Compare Registers

cmprb3: CMPRB3

0x38 - Counter/Timer B3 Compare Registers

ctrl3: CTRL3

0x3c - Counter/Timer Control

inten: INTEN

0x200 - Counter/Timer Interrupts: Enable

intstat: INTSTAT

0x204 - Counter/Timer Interrupts: Status

intclr: INTCLR

0x208 - Counter/Timer Interrupts: Clear

intset: INTSET

0x20c - Counter/Timer Interrupts: Set

Auto Trait Implementations

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