Enum aluvm::isa::Instr [−][src]
#[non_exhaustive] pub enum Instr<Extension = ReservedOp> where
Extension: InstructionSet, { ControlFlow(ControlFlowOp), Put(PutOp), Move(MoveOp), Cmp(CmpOp), Arithmetic(ArithmeticOp), Bitwise(BitwiseOp), Bytes(BytesOp), Digest(DigestOp), ExtensionCodes(Extension), ReservedInstruction(ReservedOp), Nop, }
Expand description
Full set of instructions
Variants (Non-exhaustive)
This enum is marked as non-exhaustive
Control-flow instructions. See ControlFlowOp
for the details.
Tuple Fields of ControlFlow
Instructions setting register values. See PutOp
for the details.
Tuple Fields of Put
0: PutOp
Instructions moving and swapping register values. See PutOp
for the details.
Tuple Fields of Move
0: MoveOp
Instructions comparing register values. See CmpOp
for the details.
Tuple Fields of Cmp
0: CmpOp
Arithmetic instructions. See ArithmeticOp
for the details.
Tuple Fields of Arithmetic
0: ArithmeticOp
Bit operations & boolean algebra instructions. See BitwiseOp
for the details.
Tuple Fields of Bitwise
0: BitwiseOp
Operations on byte strings. See BytesOp
for the details.
Tuple Fields of Bytes
0: BytesOp
Cryptographic hashing functions. See DigestOp
for the details.
Tuple Fields of Digest
0: DigestOp
Extension operations which can be provided by a host environment provided via generic parameter
Reserved instruction for fututre use in core ALU
ISA.
Currently equal to ControlFlowOp::Fail
.
Tuple Fields of ReservedInstruction
0: ReservedOp
No-operation instruction.
Trait Implementations
Returns number of bytes which instruction and its argument occupies
Returns range of instruction btecodes covered by a set of operations
Returns byte representing instruction code (without its arguments)
If the instruction call or references any external library, returns the call site in that library. Read more
Writes instruction arguments as bytecode, omitting instruction code byte
Reads the instruction from bytecode
ISA Extensions used by the provided instruction set. Read more
Executes given instruction taking all registers as input and output. Read more
ISA Extension IDs represented as a standard string (space-separated) Read more
ISA Extension IDs encoded in a standard way (space-separated) Read more
Checks whether provided ISA extension ID is supported by the current instruction set
Returns computational complexity of the instruction
Auto Trait Implementations
impl<Extension> RefUnwindSafe for Instr<Extension> where
Extension: RefUnwindSafe,
impl<Extension> UnwindSafe for Instr<Extension> where
Extension: UnwindSafe,
Blanket Implementations
Mutably borrows from an owned value. Read more