[−][src]Type Definition alt_sam3x8e::uotghs::HSTDMASTATUS1
type HSTDMASTATUS1 = Reg<u32, _HSTDMASTATUS1>;
Host DMA Channel Status Register (n = 1)
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about avaliable fields see hstdmastatus1 module
Trait Implementations
impl Readable for HSTDMASTATUS1
[src]
read()
method returns hstdmastatus1::R reader structure
impl ResetValue for HSTDMASTATUS1
[src]
Register HSTDMASTATUS1 reset()
's with value 0
impl Writable for HSTDMASTATUS1
[src]
write(|w| ..)
method takes hstdmastatus1::W writer structure