Module alt_sam3x8e::uotghs

USB On-The-Go Interface

Modules

ctrl	General Control Register
devctrl	Device General Control Register
devdmaaddress1	Device DMA Channel Address Register (n = 1)
devdmaaddress2	Device DMA Channel Address Register (n = 2)
devdmaaddress3	Device DMA Channel Address Register (n = 3)
devdmaaddress4	Device DMA Channel Address Register (n = 4)
devdmaaddress5	Device DMA Channel Address Register (n = 5)
devdmaaddress6	Device DMA Channel Address Register (n = 6)
devdmaaddress7	Device DMA Channel Address Register (n = 7)
devdmacontrol1	Device DMA Channel Control Register (n = 1)
devdmacontrol2	Device DMA Channel Control Register (n = 2)
devdmacontrol3	Device DMA Channel Control Register (n = 3)
devdmacontrol4	Device DMA Channel Control Register (n = 4)
devdmacontrol5	Device DMA Channel Control Register (n = 5)
devdmacontrol6	Device DMA Channel Control Register (n = 6)
devdmacontrol7	Device DMA Channel Control Register (n = 7)
devdmanxtdsc1	Device DMA Channel Next Descriptor Address Register (n = 1)
devdmanxtdsc2	Device DMA Channel Next Descriptor Address Register (n = 2)
devdmanxtdsc3	Device DMA Channel Next Descriptor Address Register (n = 3)
devdmanxtdsc4	Device DMA Channel Next Descriptor Address Register (n = 4)
devdmanxtdsc5	Device DMA Channel Next Descriptor Address Register (n = 5)
devdmanxtdsc6	Device DMA Channel Next Descriptor Address Register (n = 6)
devdmanxtdsc7	Device DMA Channel Next Descriptor Address Register (n = 7)
devdmastatus1	Device DMA Channel Status Register (n = 1)
devdmastatus2	Device DMA Channel Status Register (n = 2)
devdmastatus3	Device DMA Channel Status Register (n = 3)
devdmastatus4	Device DMA Channel Status Register (n = 4)
devdmastatus5	Device DMA Channel Status Register (n = 5)
devdmastatus6	Device DMA Channel Status Register (n = 6)
devdmastatus7	Device DMA Channel Status Register (n = 7)
devept	Device Endpoint Register
deveptcfg	Device Endpoint Configuration Register (n = 0)
devepticr	Device Endpoint Clear Register (n = 0)
devepticr0_isoenpt	Device Endpoint Clear Register (n = 0)
deveptidr	Device Endpoint Disable Register (n = 0)
deveptidr0_isoenpt	Device Endpoint Disable Register (n = 0)
deveptier	Device Endpoint Enable Register (n = 0)
deveptier0_isoenpt	Device Endpoint Enable Register (n = 0)
deveptifr	Device Endpoint Set Register (n = 0)
deveptifr0_isoenpt	Device Endpoint Set Register (n = 0)
deveptimr	Device Endpoint Mask Register (n = 0)
deveptimr0_isoenpt	Device Endpoint Mask Register (n = 0)
deveptisr	Device Endpoint Status Register (n = 0)
deveptisr0_isoenpt	Device Endpoint Status Register (n = 0)
devfnum	Device Frame Number Register
devicr	Device Global Interrupt Clear Register
devidr	Device Global Interrupt Disable Register
devier	Device Global Interrupt Enable Register
devifr	Device Global Interrupt Set Register
devimr	Device Global Interrupt Mask Register
devisr	Device Global Interrupt Status Register
fsm	General Finite State Machine Register
hstaddr1	Host Address 1 Register
hstaddr2	Host Address 2 Register
hstaddr3	Host Address 3 Register
hstctrl	Host General Control Register
hstdmaaddress1	Host DMA Channel Address Register (n = 1)
hstdmaaddress2	Host DMA Channel Address Register (n = 2)
hstdmaaddress3	Host DMA Channel Address Register (n = 3)
hstdmaaddress4	Host DMA Channel Address Register (n = 4)
hstdmaaddress5	Host DMA Channel Address Register (n = 5)
hstdmaaddress6	Host DMA Channel Address Register (n = 6)
hstdmaaddress7	Host DMA Channel Address Register (n = 7)
hstdmacontrol1	Host DMA Channel Control Register (n = 1)
hstdmacontrol2	Host DMA Channel Control Register (n = 2)
hstdmacontrol3	Host DMA Channel Control Register (n = 3)
hstdmacontrol4	Host DMA Channel Control Register (n = 4)
hstdmacontrol5	Host DMA Channel Control Register (n = 5)
hstdmacontrol6	Host DMA Channel Control Register (n = 6)
hstdmacontrol7	Host DMA Channel Control Register (n = 7)
hstdmanxtdsc1	Host DMA Channel Next Descriptor Address Register (n = 1)
hstdmanxtdsc2	Host DMA Channel Next Descriptor Address Register (n = 2)
hstdmanxtdsc3	Host DMA Channel Next Descriptor Address Register (n = 3)
hstdmanxtdsc4	Host DMA Channel Next Descriptor Address Register (n = 4)
hstdmanxtdsc5	Host DMA Channel Next Descriptor Address Register (n = 5)
hstdmanxtdsc6	Host DMA Channel Next Descriptor Address Register (n = 6)
hstdmanxtdsc7	Host DMA Channel Next Descriptor Address Register (n = 7)
hstdmastatus1	Host DMA Channel Status Register (n = 1)
hstdmastatus2	Host DMA Channel Status Register (n = 2)
hstdmastatus3	Host DMA Channel Status Register (n = 3)
hstdmastatus4	Host DMA Channel Status Register (n = 4)
hstdmastatus5	Host DMA Channel Status Register (n = 5)
hstdmastatus6	Host DMA Channel Status Register (n = 6)
hstdmastatus7	Host DMA Channel Status Register (n = 7)
hstfnum	Host Frame Number Register
hsticr	Host Global Interrupt Clear Register
hstidr	Host Global Interrupt Disable Register
hstier	Host Global Interrupt Enable Register
hstifr	Host Global Interrupt Set Register
hstimr	Host Global Interrupt Mask Register
hstisr	Host Global Interrupt Status Register
hstpip	Host Pipe Register
hstpipcfg	Host Pipe Configuration Register (n = 0)
hstpipcfg0_hsbohscp	Host Pipe Configuration Register (n = 0)
hstpiperr	Host Pipe Error Register (n = 0)
hstpipicr	Host Pipe Clear Register (n = 0)
hstpipicr0_intpipes	Host Pipe Clear Register (n = 0)
hstpipicr0_isopipes	Host Pipe Clear Register (n = 0)
hstpipidr	Host Pipe Disable Register (n = 0)
hstpipidr0_intpipes	Host Pipe Disable Register (n = 0)
hstpipidr0_isopipes	Host Pipe Disable Register (n = 0)
hstpipier	Host Pipe Enable Register (n = 0)
hstpipier0_intpipes	Host Pipe Enable Register (n = 0)
hstpipier0_isopipes	Host Pipe Enable Register (n = 0)
hstpipifr	Host Pipe Set Register (n = 0)
hstpipifr0_intpipes	Host Pipe Set Register (n = 0)
hstpipifr0_isopipes	Host Pipe Set Register (n = 0)
hstpipimr	Host Pipe Mask Register (n = 0)
hstpipimr0_intpipes	Host Pipe Mask Register (n = 0)
hstpipimr0_isopipes	Host Pipe Mask Register (n = 0)
hstpipinrq	Host Pipe IN Request Register (n = 0)
hstpipisr	Host Pipe Status Register (n = 0)
hstpipisr0_intpipes	Host Pipe Status Register (n = 0)
hstpipisr0_isopipes	Host Pipe Status Register (n = 0)
scr	General Status Clear Register
sfr	General Status Set Register
sr	General Status Register

Structs

RegisterBlock

Register block

Type Definitions

CTRL	General Control Register
DEVCTRL	Device General Control Register
DEVDMAADDRESS1	Device DMA Channel Address Register (n = 1)
DEVDMAADDRESS2	Device DMA Channel Address Register (n = 2)
DEVDMAADDRESS3	Device DMA Channel Address Register (n = 3)
DEVDMAADDRESS4	Device DMA Channel Address Register (n = 4)
DEVDMAADDRESS5	Device DMA Channel Address Register (n = 5)
DEVDMAADDRESS6	Device DMA Channel Address Register (n = 6)
DEVDMAADDRESS7	Device DMA Channel Address Register (n = 7)
DEVDMACONTROL1	Device DMA Channel Control Register (n = 1)
DEVDMACONTROL2	Device DMA Channel Control Register (n = 2)
DEVDMACONTROL3	Device DMA Channel Control Register (n = 3)
DEVDMACONTROL4	Device DMA Channel Control Register (n = 4)
DEVDMACONTROL5	Device DMA Channel Control Register (n = 5)
DEVDMACONTROL6	Device DMA Channel Control Register (n = 6)
DEVDMACONTROL7	Device DMA Channel Control Register (n = 7)
DEVDMANXTDSC1	Device DMA Channel Next Descriptor Address Register (n = 1)
DEVDMANXTDSC2	Device DMA Channel Next Descriptor Address Register (n = 2)
DEVDMANXTDSC3	Device DMA Channel Next Descriptor Address Register (n = 3)
DEVDMANXTDSC4	Device DMA Channel Next Descriptor Address Register (n = 4)
DEVDMANXTDSC5	Device DMA Channel Next Descriptor Address Register (n = 5)
DEVDMANXTDSC6	Device DMA Channel Next Descriptor Address Register (n = 6)
DEVDMANXTDSC7	Device DMA Channel Next Descriptor Address Register (n = 7)
DEVDMASTATUS1	Device DMA Channel Status Register (n = 1)
DEVDMASTATUS2	Device DMA Channel Status Register (n = 2)
DEVDMASTATUS3	Device DMA Channel Status Register (n = 3)
DEVDMASTATUS4	Device DMA Channel Status Register (n = 4)
DEVDMASTATUS5	Device DMA Channel Status Register (n = 5)
DEVDMASTATUS6	Device DMA Channel Status Register (n = 6)
DEVDMASTATUS7	Device DMA Channel Status Register (n = 7)
DEVEPT	Device Endpoint Register
DEVEPTCFG	Device Endpoint Configuration Register (n = 0)
DEVEPTICR	Device Endpoint Clear Register (n = 0)
DEVEPTICR0_ISOENPT	Device Endpoint Clear Register (n = 0)
DEVEPTIDR	Device Endpoint Disable Register (n = 0)
DEVEPTIDR0_ISOENPT	Device Endpoint Disable Register (n = 0)
DEVEPTIER	Device Endpoint Enable Register (n = 0)
DEVEPTIER0_ISOENPT	Device Endpoint Enable Register (n = 0)
DEVEPTIFR	Device Endpoint Set Register (n = 0)
DEVEPTIFR0_ISOENPT	Device Endpoint Set Register (n = 0)
DEVEPTIMR	Device Endpoint Mask Register (n = 0)
DEVEPTIMR0_ISOENPT	Device Endpoint Mask Register (n = 0)
DEVEPTISR	Device Endpoint Status Register (n = 0)
DEVEPTISR0_ISOENPT	Device Endpoint Status Register (n = 0)
DEVFNUM	Device Frame Number Register
DEVICR	Device Global Interrupt Clear Register
DEVIDR	Device Global Interrupt Disable Register
DEVIER	Device Global Interrupt Enable Register
DEVIFR	Device Global Interrupt Set Register
DEVIMR	Device Global Interrupt Mask Register
DEVISR	Device Global Interrupt Status Register
FSM	General Finite State Machine Register
HSTADDR1	Host Address 1 Register
HSTADDR2	Host Address 2 Register
HSTADDR3	Host Address 3 Register
HSTCTRL	Host General Control Register
HSTDMAADDRESS1	Host DMA Channel Address Register (n = 1)
HSTDMAADDRESS2	Host DMA Channel Address Register (n = 2)
HSTDMAADDRESS3	Host DMA Channel Address Register (n = 3)
HSTDMAADDRESS4	Host DMA Channel Address Register (n = 4)
HSTDMAADDRESS5	Host DMA Channel Address Register (n = 5)
HSTDMAADDRESS6	Host DMA Channel Address Register (n = 6)
HSTDMAADDRESS7	Host DMA Channel Address Register (n = 7)
HSTDMACONTROL1	Host DMA Channel Control Register (n = 1)
HSTDMACONTROL2	Host DMA Channel Control Register (n = 2)
HSTDMACONTROL3	Host DMA Channel Control Register (n = 3)
HSTDMACONTROL4	Host DMA Channel Control Register (n = 4)
HSTDMACONTROL5	Host DMA Channel Control Register (n = 5)
HSTDMACONTROL6	Host DMA Channel Control Register (n = 6)
HSTDMACONTROL7	Host DMA Channel Control Register (n = 7)
HSTDMANXTDSC1	Host DMA Channel Next Descriptor Address Register (n = 1)
HSTDMANXTDSC2	Host DMA Channel Next Descriptor Address Register (n = 2)
HSTDMANXTDSC3	Host DMA Channel Next Descriptor Address Register (n = 3)
HSTDMANXTDSC4	Host DMA Channel Next Descriptor Address Register (n = 4)
HSTDMANXTDSC5	Host DMA Channel Next Descriptor Address Register (n = 5)
HSTDMANXTDSC6	Host DMA Channel Next Descriptor Address Register (n = 6)
HSTDMANXTDSC7	Host DMA Channel Next Descriptor Address Register (n = 7)
HSTDMASTATUS1	Host DMA Channel Status Register (n = 1)
HSTDMASTATUS2	Host DMA Channel Status Register (n = 2)
HSTDMASTATUS3	Host DMA Channel Status Register (n = 3)
HSTDMASTATUS4	Host DMA Channel Status Register (n = 4)
HSTDMASTATUS5	Host DMA Channel Status Register (n = 5)
HSTDMASTATUS6	Host DMA Channel Status Register (n = 6)
HSTDMASTATUS7	Host DMA Channel Status Register (n = 7)
HSTFNUM	Host Frame Number Register
HSTICR	Host Global Interrupt Clear Register
HSTIDR	Host Global Interrupt Disable Register
HSTIER	Host Global Interrupt Enable Register
HSTIFR	Host Global Interrupt Set Register
HSTIMR	Host Global Interrupt Mask Register
HSTISR	Host Global Interrupt Status Register
HSTPIP	Host Pipe Register
HSTPIPCFG	Host Pipe Configuration Register (n = 0)
HSTPIPCFG0_HSBOHSCP	Host Pipe Configuration Register (n = 0)
HSTPIPERR	Host Pipe Error Register (n = 0)
HSTPIPICR	Host Pipe Clear Register (n = 0)
HSTPIPICR0_INTPIPES	Host Pipe Clear Register (n = 0)
HSTPIPICR0_ISOPIPES	Host Pipe Clear Register (n = 0)
HSTPIPIDR	Host Pipe Disable Register (n = 0)
HSTPIPIDR0_INTPIPES	Host Pipe Disable Register (n = 0)
HSTPIPIDR0_ISOPIPES	Host Pipe Disable Register (n = 0)
HSTPIPIER	Host Pipe Enable Register (n = 0)
HSTPIPIER0_INTPIPES	Host Pipe Enable Register (n = 0)
HSTPIPIER0_ISOPIPES	Host Pipe Enable Register (n = 0)
HSTPIPIFR	Host Pipe Set Register (n = 0)
HSTPIPIFR0_INTPIPES	Host Pipe Set Register (n = 0)
HSTPIPIFR0_ISOPIPES	Host Pipe Set Register (n = 0)
HSTPIPIMR	Host Pipe Mask Register (n = 0)
HSTPIPIMR0_INTPIPES	Host Pipe Mask Register (n = 0)
HSTPIPIMR0_ISOPIPES	Host Pipe Mask Register (n = 0)
HSTPIPINRQ	Host Pipe IN Request Register (n = 0)
HSTPIPISR	Host Pipe Status Register (n = 0)
HSTPIPISR0_INTPIPES	Host Pipe Status Register (n = 0)
HSTPIPISR0_ISOPIPES	Host Pipe Status Register (n = 0)
SCR	General Status Clear Register
SFR	General Status Set Register
SR	General Status Register