[−][src]Type Definition alt_sam3x8e::uotghs::HSTDMACONTROL3
type HSTDMACONTROL3 = Reg<u32, _HSTDMACONTROL3>;
Host DMA Channel Control Register (n = 3)
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about avaliable fields see hstdmacontrol3 module
Trait Implementations
impl Readable for HSTDMACONTROL3
[src]
read()
method returns hstdmacontrol3::R reader structure
impl ResetValue for HSTDMACONTROL3
[src]
Register HSTDMACONTROL3 reset()
's with value 0
impl Writable for HSTDMACONTROL3
[src]
write(|w| ..)
method takes hstdmacontrol3::W writer structure