Struct Biquad 

pub struct Biquad { /* private fields */ }

Two-channel transposed-direct-form-II biquad.

Coefficients and recursion are f64; samples are f32. Low-band poles sit within about 2 * pi * f / rate of the unit circle, which f32 cannot resolve (a 10 Hz low-pass at 96 kHz passes DC at +1.2 dB, and at 384 kHz the poles reach the circle). In f64 every band up to 768 kHz is stable and within 0.1 dB of its design.

Implementations

impl Biquad

pub fn new(kind: BiquadKind, frequency: f32, q: f32, gain_db: f32) -> Self

Creates a parametric filter.

Processor::prepare replaces non-finite parameters with 1 kHz, Q 0.707 and 0 dB, then clamps them to this module’s ranges.

Trait Implementations

impl Clone for Biquad

fn clone(&self) -> Self

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Biquad

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Processor for Biquad

fn history_samples(&self) -> u32

Additional source history for a cold seek, excluding algorithmic delay. For recursive processors this approximates uninterrupted playback rather than matching it bit for bit.

fn prepare(&mut self, sample_rate: u32, _max_block: usize)

Configures non-real-time state before processing begins.

fn process( &mut self, _ctx: &ProcessCtx, inputs: &[&[f32]], outputs: &mut [&mut [f32]], )

Processes planar channel slices supplied by the host.

fn reset(&mut self)

Clears signal history without changing authored parameters.

fn save_state(&self) -> StateBlob

Serializes history at an offline chunk boundary.

fn load_state(&mut self, state: &StateBlob) -> Result<(), StateError>

Restores history saved by a processor of the same type and preparation, atomically.

fn inputs_per_output(&self) -> usize

Input channels read per output channel: 1 for an effect, 2 with a second bus (sidechain or crossfade). A crate::ProcessorChain accepts only processors that read one.

fn latency_samples(&self) -> u32

Algorithmic delay that the graph host must compensate.