Struct PluginPortDriver 

pub struct PluginPortDriver { /* private fields */ }

PortDriver implementation for a plugin’s control plane.

Trait Implementations

impl PortDriver for PluginPortDriver

fn base(&self) -> &PortDriverBase

fn base_mut(&mut self) -> &mut PortDriverBase

fn io_write_int32(&mut self, user: &mut AsynUser, value: i32) -> AsynResult<()>

fn io_write_float64( &mut self, user: &mut AsynUser, value: f64, ) -> AsynResult<()>

fn io_write_octet( &mut self, user: &mut AsynUser, data: &[u8], ) -> AsynResult<usize>

fn read_int8_array( &mut self, _user: &AsynUser, buf: &mut [i8], ) -> AsynResult<usize>

fn read_int16_array( &mut self, _user: &AsynUser, buf: &mut [i16], ) -> AsynResult<usize>

fn read_int32_array( &mut self, _user: &AsynUser, buf: &mut [i32], ) -> AsynResult<usize>

fn read_int64_array( &mut self, _user: &AsynUser, buf: &mut [i64], ) -> AsynResult<usize>

fn read_float32_array( &mut self, _user: &AsynUser, buf: &mut [f32], ) -> AsynResult<usize>

fn read_float64_array( &mut self, _user: &AsynUser, buf: &mut [f64], ) -> AsynResult<usize>

fn connect(&mut self, user: &AsynUser) -> Result<(), AsynError>

The trivial driver’s pasynCommon->connect: C’s own does its transport work and then calls pasynManager->exceptionConnect(pasynUser), which resolves the slot it marks connected through findDpCommon on that same user (asynManager.c:2142-2162). So the addr the request carries selects the slot here too — PortDriverBase::set_addr_connected is the one owner of that resolution, and a user addressing no device marks the port’s own. A driver that overrides this owns its transport’s shape.

fn disconnect(&mut self, user: &AsynUser) -> Result<(), AsynError>

fn enable(&mut self, user: &AsynUser) -> Result<(), AsynError>

C enable(pasynUser, 1) (asynManager.c:2224-2251): ONE call, whose findDpCommon(puserPvt) picks the device’s dpCommon or the port’s from the addr the caller’s user carries (:538-545). There is no second, device-only entry point in C and none here: [PortDriverBase:: set_addr_enabled] is that resolution, and a user addressing no device lands on the port’s own slot.

fn disable(&mut self, user: &AsynUser) -> Result<(), AsynError>

fn connect_addr(&mut self, user: &AsynUser) -> Result<(), AsynError>

fn disconnect_addr(&mut self, user: &AsynUser) -> Result<(), AsynError>

fn get_option(&self, key: &str) -> Result<String, AsynError>

fn set_option( &mut self, _user: &mut AsynUser, key: &str, value: &str, ) -> Result<(), AsynError>

C asynOption::setOption(void *drvPvt, asynUser *pasynUser, key, val).

fn report(&self, out: &mut dyn Write, level: i32)

The driver’s own report — C asynCommon::report, which the manager calls last (reportPrintPort, asynManager.c:1113-1122) after printing the port’s manager-level state itself.

fn has_octet_interface(&self) -> bool

Whether this driver registered asynOctet — C’s pasynStdInterfaces->octet.pinterface != NULL, which is set from the constructor’s interfaceMask (asynPortDriver.cpp:4062). The Rust analogue of that mask is Self::capabilities.

fn read_int32(&mut self, user: &AsynUser) -> Result<i32, AsynError>

fn write_int32( &mut self, user: &mut AsynUser, value: i32, ) -> Result<(), AsynError>

fn read_int64(&mut self, user: &AsynUser) -> Result<i64, AsynError>

fn write_int64( &mut self, user: &mut AsynUser, value: i64, ) -> Result<(), AsynError>

fn get_bounds_int32(&self, _user: &AsynUser) -> Result<(i32, i32), AsynError>

C asynInt32Base.c:99 default: report low = high = 0 so a driver that does not implement getBounds makes convertAi/convertAo skip the LINEAR ESLO/EOFF computation (devAsynInt32.c:444).

fn get_bounds_int64(&self, _user: &AsynUser) -> Result<(i64, i64), AsynError>

C asynInt64Base.c:99 default: report low = high = 0 (see get_bounds_int32).

fn read_float64(&mut self, user: &AsynUser) -> Result<f64, AsynError>

fn write_float64( &mut self, user: &mut AsynUser, value: f64, ) -> Result<(), AsynError>

fn read_octet( &mut self, user: &AsynUser, buf: &mut [u8], ) -> Result<usize, AsynError>

fn write_octet( &mut self, user: &mut AsynUser, data: &[u8], ) -> Result<usize, AsynError>

fn read_uint32_digital( &mut self, user: &AsynUser, mask: u32, ) -> Result<u32, AsynError>

fn write_uint32_digital( &mut self, user: &mut AsynUser, value: u32, mask: u32, ) -> Result<(), AsynError>

fn set_interrupt_uint32_digital( &mut self, user: &AsynUser, mask: u32, reason: InterruptReason, ) -> Result<(), AsynError>

Configure rising / falling interrupt masks for a UInt32Digital parameter. C parity: asynPortDriver::setInterruptUInt32Digital (asynPortDriver.cpp:2346-2369) → routes to paramList::setUInt32Interrupt. The default delegates to the param store; drivers that need to push the configuration to hardware (e.g. real GPIB cards toggling SRQ enable) override it.

fn clear_interrupt_uint32_digital( &mut self, user: &AsynUser, mask: u32, ) -> Result<(), AsynError>

Clear bits from rising AND falling masks. C parity: asynPortDriver::clearInterruptUInt32Digital (asynPortDriver.cpp:2392-2415). Mirrors C — the call does not take an interruptReason; both masks are cleared.

fn get_interrupt_uint32_digital( &self, user: &AsynUser, reason: InterruptReason, ) -> Result<u32, AsynError>

Read the configured rising / falling / combined mask. C parity: asynPortDriver::getInterruptUInt32Digital (asynPortDriver.cpp:2438-2461).

fn read_enum( &mut self, user: &AsynUser, ) -> Result<(usize, Arc<[EnumEntry]>), AsynError>

fn write_enum( &mut self, user: &mut AsynUser, index: usize, ) -> Result<(), AsynError>

fn write_enum_choices( &mut self, user: &mut AsynUser, choices: Arc<[EnumEntry]>, ) -> Result<(), AsynError>

fn read_generic_pointer( &mut self, user: &AsynUser, ) -> Result<Arc<dyn Any + Sync + Send>, AsynError>

fn write_generic_pointer( &mut self, user: &mut AsynUser, value: Arc<dyn Any + Sync + Send>, ) -> Result<(), AsynError>

fn write_float64_array( &mut self, user: &AsynUser, data: &[f64], ) -> Result<(), AsynError>

fn write_int32_array( &mut self, user: &AsynUser, data: &[i32], ) -> Result<(), AsynError>

fn write_int8_array( &mut self, user: &AsynUser, data: &[i8], ) -> Result<(), AsynError>

fn write_int16_array( &mut self, user: &AsynUser, data: &[i16], ) -> Result<(), AsynError>

fn write_int64_array( &mut self, user: &AsynUser, data: &[i64], ) -> Result<(), AsynError>

fn write_float32_array( &mut self, user: &AsynUser, data: &[f32], ) -> Result<(), AsynError>

fn io_read_octet( &mut self, user: &AsynUser, buf: &mut [u8], ) -> Result<usize, AsynError>

fn io_read_octet_eom( &mut self, user: &AsynUser, buf: &mut [u8], ) -> Result<(usize, EomReason), AsynError>

Octet read that also reports the end-of-message reason — C parity for asynOctet::read(... int *eomReason) (asynOctet.h:38-40). The default implementation delegates to Self::io_read_octet and reconstructs a synthetic EomReason: CNT when the buffer filled, empty otherwise. Drivers that have native EOM information (asynOctetSyncIO::read, GPIB END, EOS match) must override this method so consumers — asynRecord::EOMR, asynOctetSyncIO::read mirrors — receive the real flags.

fn io_read_int32(&mut self, user: &AsynUser) -> Result<i32, AsynError>

fn io_read_int64(&mut self, user: &AsynUser) -> Result<i64, AsynError>

fn io_write_int64( &mut self, user: &mut AsynUser, value: i64, ) -> Result<(), AsynError>

fn io_read_float64(&mut self, user: &AsynUser) -> Result<f64, AsynError>

fn io_read_uint32_digital( &mut self, user: &AsynUser, mask: u32, ) -> Result<u32, AsynError>

fn io_write_uint32_digital( &mut self, user: &mut AsynUser, value: u32, mask: u32, ) -> Result<(), AsynError>

fn io_flush(&mut self, _user: &mut AsynUser) -> Result<(), AsynError>

fn set_input_eos( &mut self, user: &AsynUser, eos: &[u8], ) -> Result<(), AsynError>

The default is C’s Fail stub, not a silent cache. initOverride swaps a NULL setInputEos for setInputEosFail (asynOctetBase.c:115), which answers "<port> setInputEos not implemented" and asynError (:370-380, :401-403) — and serial, IP, IP-server and FTDI really do leave it NULL (drvAsynSerialPort.c:1003, drvAsynIPPort.c:1049-1051, drvAsynIPServerPort.c:118-123, drvAsynFTDIPort.cpp:610-612). What makes IEOS work on those ports is asynInterposeEos, installed above the driver by asynOctetBase::initialize when processEosIn is set (:169-171) — so the terminator is accepted exactly when a layer takes it, and refused otherwise. A noProcessEos port reporting success and then never terminating is the failure this refusal exists to make loud.

fn get_input_eos(&self, user: &AsynUser) -> Vec<u8>

fn set_output_eos( &mut self, user: &AsynUser, eos: &[u8], ) -> Result<(), AsynError>

The output half of Self::set_input_eos — C setOutputEosFail (asynOctetBase.c:117, :409-411).

fn get_output_eos(&self, user: &AsynUser) -> Vec<u8>

fn gpib_universal_cmd( &mut self, _user: &mut AsynUser, _cmd: u8, ) -> Result<(), AsynError>

C asynGpib::universalCmd — send one universal command byte with ATN asserted (asynGpib.c:480-484, vxiUniversalCmd drvVxi11.c:1406-1424).

fn gpib_addressed_cmd( &mut self, _user: &mut AsynUser, _data: &[u8], ) -> Result<(), AsynError>

C asynGpib::addressedCmd — send an addressed-command frame with ATN asserted (asynGpib.c:472-478, vxiAddressedCmd drvVxi11.c:1360-1404). The frame is built by crate::interfaces::gpib::addressed_request.

fn gpib_ifc(&mut self, _user: &mut AsynUser) -> Result<(), AsynError>

C asynGpib::ifc — assert Interface Clear (asynGpib.c:486-490).

fn gpib_ren( &mut self, _user: &mut AsynUser, _enable: bool, ) -> Result<(), AsynError>

C asynGpib::ren — set the Remote Enable line (asynGpib.c:492-496).

fn shutdown(&mut self) -> Result<(), AsynError>

Called when the port is being shut down. Drivers override this to release hardware resources. Matches C asynPortDriver::shutdownPortDriver().

fn drv_user_create( &mut self, req: &DrvUserRequest, ) -> Result<DrvUserInfo, AsynError>

Resolve a record’s bind request (DrvUserRequest: drvInfo string, asyn addr, and the record’s asyn interface) to a DrvUserInfo — the asyn-rs analogue of C drvUserCreate.

fn capabilities(&self) -> Vec<Capability>

Declare the capabilities this driver supports. Default implementation includes all scalar read/write operations.

fn supports(&self, cap: Capability) -> bool

Check if this driver supports a specific capability.

fn init(&mut self) -> Result<(), AsynError>