pub struct L1Section { /* private fields */ }Expand description
1 MB section translation entry, mapping a 1 MB region to a physical address.
The ARM Cortex-A architecture programmers manual chapter 9.4 (p.163) or the ARMv7-A and ArmV7-R architecture reference manual p.1323 specify these attributes in more detail.
Implementations§
Source§impl L1Section
impl L1Section
Sourcepub const ZERO: Self
pub const ZERO: Self
Creates a new instance with a raw value of 0. Equivalent to [Self::new_with_raw_value(0)].
Sourcepub const fn new() -> Self
👎Deprecated: Use L1Section::Default (or L1Section::DEFAULT in const context) instead
pub const fn new() -> Self
Creates a new instance of this struct using the default value
Sourcepub const fn new_with_raw_value(value: u32) -> L1Section
pub const fn new_with_raw_value(value: u32) -> L1Section
Creates a new instance of this bitfield with the given raw value.
No checks are performed on the value, so it is possible to set bits that don’t have any accessors specified.
Sourcepub const fn builder() -> PartialL1Section<0>
pub const fn builder() -> PartialL1Section<0>
Creates a builder for this bitfield which ensures that all writable fields are initialized
Sourcepub const fn base_addr_upper_bits(&self) -> u12
pub const fn base_addr_upper_bits(&self) -> u12
Section base address upper bits.
Sourcepub const fn with_base_addr_upper_bits(&self, field_value: u12) -> Self
pub const fn with_base_addr_upper_bits(&self, field_value: u12) -> Self
Section base address upper bits.
Sourcepub fn set_base_addr_upper_bits(&mut self, field_value: u12)
pub fn set_base_addr_upper_bits(&mut self, field_value: u12)
Section base address upper bits.
pub const fn apx(&self) -> bool
pub const fn with_apx(&self, field_value: bool) -> Self
pub fn set_apx(&mut self, field_value: bool)
pub const fn ap(&self) -> u2
pub const fn with_ap(&self, field_value: u2) -> Self
pub fn set_ap(&mut self, field_value: u2)
pub const fn p_bit(&self) -> bool
pub const fn with_p_bit(&self, field_value: bool) -> Self
pub fn set_p_bit(&mut self, field_value: bool)
pub const fn domain(&self) -> u4
pub const fn with_domain(&self, field_value: u4) -> Self
pub fn set_domain(&mut self, field_value: u4)
pub const fn xn(&self) -> bool
pub const fn with_xn(&self, field_value: bool) -> Self
pub fn set_xn(&mut self, field_value: bool)
pub const fn c(&self) -> bool
pub const fn with_c(&self, field_value: bool) -> Self
pub fn set_c(&mut self, field_value: bool)
pub const fn b(&self) -> bool
pub const fn with_b(&self, field_value: bool) -> Self
pub fn set_b(&mut self, field_value: bool)
pub const fn entry_type(&self) -> L1EntryType
pub const fn with_entry_type(&self, field_value: L1EntryType) -> Self
pub fn set_entry_type(&mut self, field_value: L1EntryType)
Source§impl L1Section
impl L1Section
Sourcepub const fn new_with_addr_and_attrs(
phys_addr: u32,
section_attrs: SectionAttributes,
) -> Self
pub const fn new_with_addr_and_attrs( phys_addr: u32, section_attrs: SectionAttributes, ) -> Self
Generates a new L1 section from a physical address and section attributes.
The uppermost 12 bits of the physical address define which 1 MB of virtual address space are being accessed. They will be stored in the L1 section table. This address MUST be aligned to 1 MB.
§Panics
Physcal address not aligned to 1 MB.
Sourcepub fn section_attrs(&self) -> Result<SectionAttributes, InvalidL1EntryType>
pub fn section_attrs(&self) -> Result<SectionAttributes, InvalidL1EntryType>
Retrieve the section attributes.
Sourcepub fn set_section_attrs(&mut self, section_attrs: SectionAttributes)
pub fn set_section_attrs(&mut self, section_attrs: SectionAttributes)
Set the section attributes without changing the address.
Sourcepub const fn new_with_addr_upper_bits_and_attrs(
addr_upper_twelve_bits: u12,
section_attrs: SectionAttributes,
) -> Self
pub const fn new_with_addr_upper_bits_and_attrs( addr_upper_twelve_bits: u12, section_attrs: SectionAttributes, ) -> Self
Create a new L1 section with the given upper 12 bits of the address and section attributes.