Enum yaxpeax_superh::SuperHInstruction [−][src]
pub enum SuperHInstruction {
Show 235 variants
MovImm(u8, SuperHRegister),
MovImmW(Displacement8, SuperHRegister),
MovImmL(Displacement8, SuperHRegister),
MovReg(SuperHRegister, SuperHRegister),
MovToAtRegB(SuperHRegister, SuperHRegister),
MovToAtRegW(SuperHRegister, SuperHRegister),
MovToAtRegL(SuperHRegister, SuperHRegister),
MovFromAtRegB(SuperHRegister, SuperHRegister),
MovFromAtRegW(SuperHRegister, SuperHRegister),
MovFromAtRegL(SuperHRegister, SuperHRegister),
MovToAtRegPreDecrementB(SuperHRegister, SuperHRegister),
MovToAtRegPreDecrementW(SuperHRegister, SuperHRegister),
MovToAtRegPreDecrementL(SuperHRegister, SuperHRegister),
MovFromAtRegPostIncrementB(SuperHRegister, SuperHRegister),
MovFromAtRegPostIncrementW(SuperHRegister, SuperHRegister),
MovFromAtRegPostIncrementL(SuperHRegister, SuperHRegister),
MovToAtDisplacedRegisterB(Displacement4, SuperHRegister),
MovToAtDisplacedRegisterW(Displacement4, SuperHRegister),
MovToAtDisplacedRegisterL(SuperHRegister, Displacement4, SuperHRegister),
MovFromAtDisplacedRegisterB(Displacement4, SuperHRegister),
MovFromAtDisplacedRegisterW(Displacement4, SuperHRegister),
MovFromAtDisplacedRegisterL(Displacement4, SuperHRegister, SuperHRegister),
MovToAtIndexedRegisterB(SuperHRegister, SuperHRegister),
MovToAtIndexedRegisterW(SuperHRegister, SuperHRegister),
MovToAtIndexedRegisterL(SuperHRegister, SuperHRegister),
MovFromAtIndexedRegisterB(SuperHRegister, SuperHRegister),
MovFromAtIndexedRegisterW(SuperHRegister, SuperHRegister),
MovFromAtIndexedRegisterL(SuperHRegister, SuperHRegister),
MovToAtDisplacedGbrB(Displacement8),
MovToAtDisplacedGbrW(Displacement8),
MovToAtDisplacedGbrL(Displacement8),
MovFromAtDisplacedGbrB(Displacement8),
MovFromAtDisplacedGbrW(Displacement8),
MovFromAtDisplacedGbrL(Displacement8),
Mova(Displacement8),
Movt(SuperHRegister),
SwapB(SuperHRegister, SuperHRegister),
SwapW(SuperHRegister, SuperHRegister),
Xtrct(SuperHRegister, SuperHRegister),
AddReg(SuperHRegister, SuperHRegister),
AddImm(u8, SuperHRegister),
AddC(SuperHRegister, SuperHRegister),
AddV(SuperHRegister, SuperHRegister),
CmpEqImm(u8),
CmpEqReg(SuperHRegister, SuperHRegister),
CmpHs(SuperHRegister, SuperHRegister),
CmpGe(SuperHRegister, SuperHRegister),
CmpHi(SuperHRegister, SuperHRegister),
CmpGt(SuperHRegister, SuperHRegister),
CmpPz(SuperHRegister),
CmpPl(SuperHRegister),
CmpStr(SuperHRegister, SuperHRegister),
Div1(SuperHRegister, SuperHRegister),
Div0S(SuperHRegister, SuperHRegister),
Div0U,
DmulsL(SuperHRegister, SuperHRegister),
DmuluL(SuperHRegister, SuperHRegister),
Dt(SuperHRegister),
ExtsB(SuperHRegister, SuperHRegister),
ExtsW(SuperHRegister, SuperHRegister),
ExtuB(SuperHRegister, SuperHRegister),
ExtuW(SuperHRegister, SuperHRegister),
MacL(SuperHRegister, SuperHRegister),
MacW(SuperHRegister, SuperHRegister),
MulL(SuperHRegister, SuperHRegister),
MulsW(SuperHRegister, SuperHRegister),
MuluW(SuperHRegister, SuperHRegister),
Neg(SuperHRegister, SuperHRegister),
Negc(SuperHRegister, SuperHRegister),
Sub(SuperHRegister, SuperHRegister),
Subc(SuperHRegister, SuperHRegister),
Subv(SuperHRegister, SuperHRegister),
AndReg(SuperHRegister, SuperHRegister),
AndImm(u8),
AndB(u8),
Not(SuperHRegister, SuperHRegister),
OrReg(SuperHRegister, SuperHRegister),
OrImm(u8),
OrB(u8),
TasB(SuperHRegister),
TstReg(SuperHRegister, SuperHRegister),
TstImm(u8),
TstB(u8),
XorReg(SuperHRegister, SuperHRegister),
XorImm(u8),
XorB(u8),
RotL(SuperHRegister),
RotR(SuperHRegister),
RotcL(SuperHRegister),
RotcR(SuperHRegister),
ShaD(SuperHRegister, SuperHRegister),
ShaL(SuperHRegister),
ShaR(SuperHRegister),
ShlD(SuperHRegister, SuperHRegister),
ShlL(SuperHRegister),
ShlR(SuperHRegister),
ShlL2(SuperHRegister),
ShlR2(SuperHRegister),
ShlL8(SuperHRegister),
ShlR8(SuperHRegister),
ShlL16(SuperHRegister),
ShlR16(SuperHRegister),
Bf(Displacement8),
BfS(Displacement8),
Bt(Displacement8),
BtS(Displacement8),
Bra(Displacement12),
BraF(SuperHRegister),
Bsr(Displacement12),
BsrF(SuperHRegister),
Jmp(SuperHRegister),
Jsr(SuperHRegister),
Rts,
ClrMac,
ClrS,
ClrT,
LdcSr(SuperHRegister),
LdcGbr(SuperHRegister),
LdcVbr(SuperHRegister),
LdcSsr(SuperHRegister),
LdcSpc(SuperHRegister),
LdcDbr(SuperHRegister),
LdcRnBank(SuperHRegister, SuperHRegisterBank),
LdcLSr(SuperHRegister),
LdcLGbr(SuperHRegister),
LdcLVbr(SuperHRegister),
LdcLSsr(SuperHRegister),
LdcLSpc(SuperHRegister),
LdcLDbr(SuperHRegister),
LdcLRnBank(SuperHRegister, SuperHRegisterBank),
LdsMach(SuperHRegister),
LdsMacl(SuperHRegister),
LdsPr(SuperHRegister),
LdsLMach(SuperHRegister),
LdsLMacl(SuperHRegister),
LdsLPr(SuperHRegister),
Ldtlb,
MovcaL(SuperHRegister),
Nop,
OcbI(SuperHRegister),
OcbP(SuperHRegister),
OcbWb(SuperHRegister),
Pref(SuperHRegister),
Rte,
SetS,
SetT,
Sleep,
StcSr(SuperHRegister),
StcGbr(SuperHRegister),
StcVbr(SuperHRegister),
StcSsr(SuperHRegister),
StcSpc(SuperHRegister),
StcSgr(SuperHRegister),
StcDbr(SuperHRegister),
StcRmBank(SuperHRegisterBank, SuperHRegister),
StcLSr(SuperHRegister),
StcLGbr(SuperHRegister),
StcLVbr(SuperHRegister),
StcLSsr(SuperHRegister),
StcLSpc(SuperHRegister),
StcLSgr(SuperHRegister),
StcLDbr(SuperHRegister),
StcLRmBank(SuperHRegisterBank, SuperHRegister),
StsMach(SuperHRegister),
StsMacl(SuperHRegister),
StsPr(SuperHRegister),
StsLMach(SuperHRegister),
StsLMacl(SuperHRegister),
StsLPr(SuperHRegister),
Trapa(u8),
Fldi0(SuperHFloatRegister),
Fldi1(SuperHFloatRegister),
FMovS(SuperHFloatRegister, SuperHFloatRegister),
FMovAtRegS(SuperHRegister, SuperHFloatRegister),
FMovAtIndexedRegisterS(SuperHRegister, SuperHFloatRegister),
FMovAtPostIncrementRegS(SuperHRegister, SuperHFloatRegister),
FMovToAtRegS(SuperHFloatRegister, SuperHRegister),
FMovToAtPreDecrementRegS(SuperHFloatRegister, SuperHRegister),
FMovToAtIndexedRegisterS(SuperHFloatRegister, SuperHRegister),
FMov(SuperHDoubleRegister, SuperHDoubleRegister),
FMovAtReg(SuperHRegister, SuperHDoubleRegister),
FMovAtIndexedRegister(SuperHRegister, SuperHDoubleRegister),
FMovAtPostIncrementReg(SuperHRegister, SuperHDoubleRegister),
FMovToAtReg(SuperHDoubleRegister, SuperHRegister),
FMovToAtPreDecrementReg(SuperHDoubleRegister, SuperHRegister),
FMovToAtIndexedRegister(SuperHDoubleRegister, SuperHRegister),
Flds(SuperHFloatRegister),
Fsts(SuperHFloatRegister),
FabsS(SuperHFloatRegister),
FaddS(SuperHFloatRegister, SuperHFloatRegister),
FcmpEqS(SuperHFloatRegister, SuperHFloatRegister),
FcmpGtS(SuperHFloatRegister, SuperHFloatRegister),
FdivS(SuperHFloatRegister, SuperHFloatRegister),
FloatS(SuperHFloatRegister),
Fmac(SuperHFloatRegister, SuperHFloatRegister),
FmulS(SuperHFloatRegister, SuperHFloatRegister),
FnegS(SuperHFloatRegister),
FsqrtS(SuperHFloatRegister),
FsubS(SuperHFloatRegister, SuperHFloatRegister),
FrtcS(SuperHFloatRegister),
Fabs(SuperHDoubleRegister),
Fadd(SuperHDoubleRegister, SuperHDoubleRegister),
FcmpEq(SuperHDoubleRegister, SuperHDoubleRegister),
FcmpGt(SuperHDoubleRegister, SuperHDoubleRegister),
Fdiv(SuperHDoubleRegister, SuperHDoubleRegister),
FcnvDs(SuperHDoubleRegister),
FcnvSd(SuperHDoubleRegister),
Float(SuperHDoubleRegister),
Fmul(SuperHDoubleRegister, SuperHDoubleRegister),
Fneg(SuperHDoubleRegister),
Fsqrt(SuperHDoubleRegister),
Fsub(SuperHDoubleRegister, SuperHDoubleRegister),
Frtc(SuperHDoubleRegister),
LdsFpscr(SuperHRegister),
LdsFpul(SuperHRegister),
LdsFpscrL(SuperHRegister),
LdsFpulL(SuperHRegister),
StsFpscr(SuperHRegister),
StsFpul(SuperHRegister),
StsFpscrL(SuperHRegister),
StsFpulL(SuperHRegister),
FMovToX(SuperHDoubleRegister, SuperHExtendedDoubleRegister),
FMovFromX(SuperHExtendedDoubleRegister, SuperHDoubleRegister),
FMovX(SuperHExtendedDoubleRegister, SuperHExtendedDoubleRegister),
FMovAtRegX(SuperHRegister, SuperHExtendedDoubleRegister),
FMovAtPostIncrementRegX(SuperHRegister, SuperHExtendedDoubleRegister),
FMovAtIndexedRegisterX(SuperHRegister, SuperHExtendedDoubleRegister),
FMovToAtRegX(SuperHExtendedDoubleRegister, SuperHRegister),
FMovToAtPreDecrementRegX(SuperHExtendedDoubleRegister, SuperHRegister),
FMovToAtIndexedRegisterX(SuperHExtendedDoubleRegister, SuperHRegister),
Fipr(SuperHVectorFloatRegister, SuperHVectorFloatRegister),
Xmrtx(SuperHVectorFloatRegister),
FrChg,
FsChg,
CasL(SuperHRegister, SuperHRegister),
}
Variants
MovImm(u8, SuperHRegister)
MOV #imm,Rn (imm
→ sign extension → Rn
) 1110nnnniiiiiiii
MovImmW(Displacement8, SuperHRegister)
MOV.W @(disp,PC),Rn ((disp * 2 + PC + 4)
→ sign extension → Rn
) 1001nnnndddddddd
MovImmL(Displacement8, SuperHRegister)
MOV.L @(disp,PC),Rn ((disp * 2 + PC & 0xFFFF_FFFC + 4)
→ Rn
) 1101nnnndddddddd
MovReg(SuperHRegister, SuperHRegister)
MOV Rm,Rn (Rm
→ Rn
) 0110nnnnmmmm0011
MovToAtRegB(SuperHRegister, SuperHRegister)
MOV.B Rm,@Rn (Rm
→ sign extension → (Rn)
) 0010nnnnmmmm0000
MovToAtRegW(SuperHRegister, SuperHRegister)
MOV.W Rm,@Rn (Rm
→ sign extension → (Rn)
) 0010nnnnmmmm0001
MovToAtRegL(SuperHRegister, SuperHRegister)
MOV.L Rm,@Rn (Rm
→ (Rn)
) 0010nnnnmmmm0010
MovFromAtRegB(SuperHRegister, SuperHRegister)
MOV.B @Rm,Rn ((Rm)
→ sign extension → Rn
) 0110nnnnmmmm0000
MovFromAtRegW(SuperHRegister, SuperHRegister)
MOV.W @Rm,Rn ((Rm)
→ sign extension → Rn
) 0110nnnnmmmm0001
MovFromAtRegL(SuperHRegister, SuperHRegister)
MOV.L @Rm,Rn ((Rm)
→ Rn
) 0110nnnnmmmm0010
MovToAtRegPreDecrementB(SuperHRegister, SuperHRegister)
MOV.B Rm,@-Rn (Rn - 1
→ Rn
, Rm
→ (Rn)
) 0010nnnnmmmm0100
MovToAtRegPreDecrementW(SuperHRegister, SuperHRegister)
MOV.W Rm,@-Rn (Rn - 2
→ Rn
, Rm
→ (Rn)
) 0010nnnnmmmm0101
MovToAtRegPreDecrementL(SuperHRegister, SuperHRegister)
MOV.L Rm,@-Rn (Rn - 4
→ Rn
, Rm
→ (Rn)
) 0010nnnnmmmm0110
MovFromAtRegPostIncrementB(SuperHRegister, SuperHRegister)
MOV.B @Rm+,Rn ((Rm)
→ sign extension → Rn
, Rm + 1
→ Rm
) 0110nnnnmmmm0100
MovFromAtRegPostIncrementW(SuperHRegister, SuperHRegister)
MOV.W @Rm+,Rn ((Rm)
→ sign extension → Rn
, Rm + 2
→ Rm
) 0110nnnnmmmm0101
MovFromAtRegPostIncrementL(SuperHRegister, SuperHRegister)
MOV.L @Rm+,Rn ((Rm)
→ sign extension → Rn
, Rm + 4
→ Rm
) 0110nnnnmmmm0110
MovToAtDisplacedRegisterB(Displacement4, SuperHRegister)
MOV.B R0,@(disp,Rn) (R0
→ (disp + Rn)
) 10000000nnnndddd
MovToAtDisplacedRegisterW(Displacement4, SuperHRegister)
MOV.W R0,@(disp,Rn) (R0
→ (disp * 2 + Rn)
) 10000001nnnndddd
MovToAtDisplacedRegisterL(SuperHRegister, Displacement4, SuperHRegister)
MOV.L Rm,@(disp,Rn) (Rm
→ (disp * 4 + Rn)
) 0001nnnnmmmmdddd
MovFromAtDisplacedRegisterB(Displacement4, SuperHRegister)
MOV.B @(disp,Rm),R0 ((disp + Rm)
→ sign extension → R0
) 10000100mmmmdddd
MovFromAtDisplacedRegisterW(Displacement4, SuperHRegister)
MOV.W @(disp,Rm),R0 ((disp * 2 + Rm)
→ sign extension → R0
) 10000101mmmmdddd
MovFromAtDisplacedRegisterL(Displacement4, SuperHRegister, SuperHRegister)
MOV.L @(disp,Rm),Rn ((disp * 4 + Rm)
→ Rn
) 0101nnnnmmmmdddd
MovToAtIndexedRegisterB(SuperHRegister, SuperHRegister)
MOV.B Rm,@(R0,Rn) (Rm
→ (R0 + Rn)
) 0000nnnnmmmm0100
MovToAtIndexedRegisterW(SuperHRegister, SuperHRegister)
MOV.W Rm,@(R0,Rn) (Rm
→ (R0 + Rn)
) 0000nnnnmmmm0101
MovToAtIndexedRegisterL(SuperHRegister, SuperHRegister)
MOV.L Rm,@(R0,Rn) (Rm
→ (R0 + Rn)
) 0000nnnnmmmm0110
MovFromAtIndexedRegisterB(SuperHRegister, SuperHRegister)
MOV.B @(R0,Rm),Rn ((R0 + Rm)
→ sign extension → Rn
) 0000nnnnmmmm1100
MovFromAtIndexedRegisterW(SuperHRegister, SuperHRegister)
MOV.W @(R0,Rm),Rn ((R0 + Rm)
→ sign extension → Rn
) 0000nnnnmmmm1101
MovFromAtIndexedRegisterL(SuperHRegister, SuperHRegister)
MOV.L @(R0,Rm),Rn ((R0 + Rm)
→ Rn
) 0000nnnnmmmm1110
MovToAtDisplacedGbrB(Displacement8)
Tuple Fields
MOV.B R0,@(disp,GBR) (R0
→ (disp + GBR)
) 11000000dddddddd
MovToAtDisplacedGbrW(Displacement8)
Tuple Fields
MOV.W R0,@(disp,GBR) (R0
→ (disp * 2 + GBR)
) 11000001dddddddd
MovToAtDisplacedGbrL(Displacement8)
Tuple Fields
MOV.L R0,@(disp,GBR) (R0
→ (disp * 4 + GBR)
) 11000010dddddddd
MovFromAtDisplacedGbrB(Displacement8)
Tuple Fields
MOV.B @(disp,GBR),R0 ((disp + GBR)
→ sign extension → R0
) 11000100dddddddd
MovFromAtDisplacedGbrW(Displacement8)
Tuple Fields
MOV.W @(disp,GBR),R0 ((disp * 2 + GBR)
→ sign extension → R0
) 11000101dddddddd
MovFromAtDisplacedGbrL(Displacement8)
Tuple Fields
MOV.L @(disp,GBR),R0 ((disp * 4 + GBR)
→ R0
) 11000110dddddddd
Mova(Displacement8)
Tuple Fields
MOVA @(disp,PC),R0 (disp * 4 + PC & 0xFFFF_FFFC + 4
→ R0
) 11000111dddddddd
Movt(SuperHRegister)
Tuple Fields
MOVT Rn (T
→ Rn
) 0000nnnn00101001
SwapB(SuperHRegister, SuperHRegister)
SWAP.B Rm,Rn (Rm
→ swap lower 2 bytes → REG
) 0110nnnnmmmm1000
SwapW(SuperHRegister, SuperHRegister)
SWAP.W Rm,Rn (Rm
→ swap upper/lower words → REG
) 0110nnnnmmmm1001
Xtrct(SuperHRegister, SuperHRegister)
XTRCT Rm,Rn (Rm:Rn
middle 32 bits → Rn) 0010nnnnmmmm1101
AddReg(SuperHRegister, SuperHRegister)
ADD Rm,Rn (Rn + Rm
→ Rn
) 0011nnnnmmmm1100
AddImm(u8, SuperHRegister)
ADD #imm,Rn (Rn + imm
→ Rn
) 0111nnnniiiiiiii
AddC(SuperHRegister, SuperHRegister)
ADDC Rm,Rn (Rn + Rm + T
→ Rn
, carry → T
) 0011nnnnmmmm1110
T = Carry
AddV(SuperHRegister, SuperHRegister)
ADDV Rm,Rn (Rn + Rm
→ Rn
, overflow → T
) 0011nnnnmmmm1111
T = Overflow
CmpEqImm(u8)
Tuple Fields
0: u8
CMP/EQ #imm,R0 (When R0
= imm
, 1 → T
; Otherwise, 0 → T
) 10001000iiiiiiii
T = Comparison result
CmpEqReg(SuperHRegister, SuperHRegister)
CMP/EQ Rm,Rn (When Rn
= Rm
, 1 → T
; Otherwise, 0 → T
) 0011nnnnmmmm0000
T = Comparison result
CmpHs(SuperHRegister, SuperHRegister)
CMP/HS Rm,Rn (When Rn
≥ Rm
(unsigned), 1 → T
; Otherwise, 0 → T
) 0011nnnnmmmm0010
T = Comparison result
CmpGe(SuperHRegister, SuperHRegister)
CMP/GE Rm,Rn (When Rn
≥ Rm
(signed), 1 → T
; Otherwise, 0 → T
) 0011nnnnmmmm0011
T = Comparison result
CmpHi(SuperHRegister, SuperHRegister)
CMP/HI Rm,Rn (When Rn
> Rm
(unsigned), 1 → T
; Otherwise, 0 → T
) 0011nnnnmmmm0110
T = Comparison result
CmpGt(SuperHRegister, SuperHRegister)
CMP/GT Rm,Rn (When Rn
> Rm
(signed), 1 → T
; Otherwise, 0 → T
) 0011nnnnmmmm0111
T = Comparison result
CmpPz(SuperHRegister)
Tuple Fields
CMP/PZ Rn (When Rn
≥ 0, 1 → T
; Otherwise, 0 → T
) 0100nnnn00010001
T = Comparison result
CmpPl(SuperHRegister)
Tuple Fields
CMP/PL Rn (When Rn
> 0, 1 → T
; Otherwise, 0 → T
) 0100nnnn00010101
T = Comparison result
CmpStr(SuperHRegister, SuperHRegister)
CMP/STR Rm,Rn (When any bytes are equal, 1 → T
; Otherwise, 0 → T
) 0010nnnnmmmm1100
T = Comparison result
Div1(SuperHRegister, SuperHRegister)
DIV1 Rm,Rn (1-step division (Rn ÷ Rm
)) 0011nnnnmmmm0100
T = Calculation result
Div0S(SuperHRegister, SuperHRegister)
DIV0S Rm,Rn (MSB of Rn
→ Q
, MSB of Rm
→ M
, M ^ Q
→ T
) 0010nnnnmmmm0111
T = Calculation result
Div0U
DIV0U (0 → M
/Q
/T
) 0000000000011001
T = 0
DmulsL(SuperHRegister, SuperHRegister)
DMULS.L Rm,Rn (Signed, Rn * Rm
→ MAC
, 32 * 32 → 64 bits) 0011nnnnmmmm1101
Level: Sh2
DmuluL(SuperHRegister, SuperHRegister)
DMULU.L Rm,Rn (Unsigned, Rn * Rm
→ MAC
, 32 * 32 → 64 bits) 0011nnnnmmmm0101
Level: Sh2
Dt(SuperHRegister)
Tuple Fields
DT Rn (Rn - 1
→ Rn
; When Rn
= 0, 1 → T; Otherwise Rn
≠ 0, 0 → T
) 0100nnnn00010000
T = Comparison result
Level: Sh2
ExtsB(SuperHRegister, SuperHRegister)
EXTS.B Rm,Rn (Rm
sign-extended from byte → Rn
) 0110nnnnmmmm1110
ExtsW(SuperHRegister, SuperHRegister)
EXTS.W Rm,Rn (Rm
sign-extended from word → Rn
) 0110nnnnmmmm1111
ExtuB(SuperHRegister, SuperHRegister)
EXTU.B Rm,Rn (Rm
zero-extended from byte → Rn
) 0110nnnnmmmm1100
ExtuW(SuperHRegister, SuperHRegister)
EXTU.W Rm,Rn (Rm
zero-extended from word → Rn
) 0110nnnnmmmm1101
MacL(SuperHRegister, SuperHRegister)
MAC.L @Rm+,@Rn+ (Signed, (Rn) * (Rm) + MAC
→ MAC
, Rn + 4
→ Rn
, Rm + 4
→ Rm; 32 * 32 + 64 → 64 bits)
0000nnnnmmmm1111`
Level: Sh2
MacW(SuperHRegister, SuperHRegister)
MAC.L @Rm+,@Rn+ (Signed, (Rn) * (Rm) + MAC
→ MAC
, Rn + 2
→ Rn
, Rm + 2
→ Rm; 16 * 16 + 64 → 64 bits)
0100nnnnmmmm1111`
MulL(SuperHRegister, SuperHRegister)
MAC.L Rm,Rn (Rn * Rm
→ MACL
, 32 * 32→ 32 bits) 0000nnnnmmmm0111
Level: Sh2
MulsW(SuperHRegister, SuperHRegister)
MULS.W Rm,Rn (Signed, Rn * Rm
→ MACL
, 16 * 16 → 32 bits) 0010nnnnmmmm1111
MuluW(SuperHRegister, SuperHRegister)
MULU.W Rm,Rn (Unsigned, Rn * Rm
→ MACL
, 16 * 16 → 32 bits) 0010nnnnmmmm1110
Neg(SuperHRegister, SuperHRegister)
NEG Rm,Rn (0 - Rm
→ Rn) 0110nnnnmmmm1011
Negc(SuperHRegister, SuperHRegister)
NEGC Rm,Rn (0 - Rm - T
→ Rn
, borrow → T
) 0110nnnnmmmm1010
T = Borrow
Sub(SuperHRegister, SuperHRegister)
SUB Rm,Rn (Rn - Rm
→ Rn) 0011nnnnmmmm1000
Subc(SuperHRegister, SuperHRegister)
SUBC Rm,Rn (Rn - Rm - T
→ Rn
, borrow → T
) 0011nnnnmmmm1010
T = Borrow
Subv(SuperHRegister, SuperHRegister)
SUBV Rm,Rn (Rn - Rm
→ Rn
, underflow → T
) 0011nnnnmmmm1011
T = Underflow
AndReg(SuperHRegister, SuperHRegister)
AND Rm,Rn (Rn & Rm
→ Rn
) 0010nnnnmmmm1001
AndImm(u8)
Tuple Fields
0: u8
AND #imm,R0 (R0 & imm
→ R0
) 11001001iiiiiiii
AndB(u8)
Tuple Fields
0: u8
AND.B #imm,@(R0,GBR) ((R0 + GBR) & imm
→ (R0 + GBR)
) 11001101iiiiiiii
Not(SuperHRegister, SuperHRegister)
NOT Rm,Rn (~Rm
→ Rn
) 0110nnnnmmmm0111
OrReg(SuperHRegister, SuperHRegister)
OR Rm,Rn (Rn | Rm
→ Rn
) 0010nnnnmmmm1011
OrImm(u8)
Tuple Fields
0: u8
OR #imm,R0 (R0 | imm
→ R0
) 11001011iiiiiiii
OrB(u8)
Tuple Fields
0: u8
OR.B #imm,@(R0,GBR) ((R0 + GBR) | imm
→ (R0 + GBR)
) 11001111iiiiiiii
TasB(SuperHRegister)
Tuple Fields
TAS.B @Rn (When (Rn)
= 0, 1 → T
; Otherwise, 0 → T
; In both cases, 1 → MSB of (Rn)
) 0100nnnn00011011
T = Test result
TstReg(SuperHRegister, SuperHRegister)
TST Rm,Rn (Rn & Rm
; when result = 0, 1 → T
; Otherwise, 0 → T
) 0010nnnnmmmm1000
T = Test result
TstImm(u8)
Tuple Fields
0: u8
TST #imm,R0 (R0 & imm
; when result = 0, 1 → T
; Otherwise, 0 → T
) 11001000iiiiiiii
T = Test result
TstB(u8)
Tuple Fields
0: u8
TST.B #imm,@(R0,GBR) ((R0 + GBR) & imm
, When result = 0, 1 → T
; Otherwise, 0 → T
) 11001100iiiiiiii
T = Test result
XorReg(SuperHRegister, SuperHRegister)
XOR Rm,Rn (Rn ^ Rm → Rn
) 0010nnnnmmmm1010
T = Test result
XorImm(u8)
Tuple Fields
0: u8
XOR #imm,R0 (R0 ^ imm → R0
) 11001010iiiiiiii
T = Test result
XorB(u8)
Tuple Fields
0: u8
XOR.B #imm,@(R0,GBR) ((R0 + GBR) ^ imm → R0
) 11001110iiiiiiii
T = Test result
RotL(SuperHRegister)
Tuple Fields
ROTL Rn (T
← Rn
← MSB
) 0100nnnn00000100
T = MSB
RotR(SuperHRegister)
Tuple Fields
ROTR Rn (LSB
→ Rn
→ T
) 0100nnnn00000101
T = LSB
RotcL(SuperHRegister)
Tuple Fields
ROTCL Rn (T
← Rn
← T
) 0100nnnn00100100
T = MSB
RotcR(SuperHRegister)
Tuple Fields
ROTCR Rn (T
→ Rn
→ T
) 0100nnnn00100101
T = LSB
ShaD(SuperHRegister, SuperHRegister)
SHAD Rm,Rn (When Rn
≥ 0, Rn << Rm
→ Rn
, When Rn
< 0, Rn >> Rm
→ [MSB
→ Rn
]) 0100nnnnmmmm1100
Level: J2
ShaL(SuperHRegister)
Tuple Fields
SHAL Rn (T
← Rn
← 0) 0100nnnn00100000
T = MSB
ShaR(SuperHRegister)
Tuple Fields
SHAR Rn (MSB → Rn
→ T
) 0100nnnn00100001
T = LSB
ShlD(SuperHRegister, SuperHRegister)
SHLD Rm,Rn (When Rn
≥ 0, Rn << Rm
→ Rn
, When Rn
< 0, Rn >> Rm
→ [0
→ Rn
]) 0100nnnnmmmm1101
Level: J2
ShlL(SuperHRegister)
Tuple Fields
SHLL Rn (T
← Rn
← 0) 0100nnnn00000000
T = MSB
ShlR(SuperHRegister)
Tuple Fields
SHLR Rn (0 → Rn
→ T
) 0100nnnn00000001
T = LSB
ShlL2(SuperHRegister)
Tuple Fields
SHLL2 Rn (Rn << 2
→ Rn
) 0100nnnn00001000
ShlR2(SuperHRegister)
Tuple Fields
SHLR2 Rn (Rn >> 2
→ Rn
) 0100nnnn00001001
ShlL8(SuperHRegister)
Tuple Fields
SHLL8 Rn (Rn << 8
→ Rn
) 0100nnnn00011000
ShlR8(SuperHRegister)
Tuple Fields
SHLR8 Rn (Rn >> 8
→ Rn
) 0100nnnn00011001
ShlL16(SuperHRegister)
Tuple Fields
SHLL16 Rn (Rn << 16
→ Rn
) 0100nnnn00101000
ShlR16(SuperHRegister)
Tuple Fields
SHLR16 Rn (Rn >> 16
→ Rn
) 0100nnnn00101001
Bf(Displacement8)
Tuple Fields
BF label (When T
= 0, disp * 2 + PC + 4
→ PC
, When T
= 1, nop) 10001011dddddddd
BfS(Displacement8)
Tuple Fields
BF/S label (Delayed branch; When T
= 0, disp * 2 + PC + 4
→ PC
, When T
= 1, nop) 10001111dddddddd
Level: Sh2
Bt(Displacement8)
Tuple Fields
BT label (When T
= 1, disp * 2 + PC + 4
→ PC
, When T
= 0, nop) 10001001dddddddd
BtS(Displacement8)
Tuple Fields
BT/S label (Delayed branch; When T
= 1, disp * 2 + PC + 4
→ PC
, When T
= 0, nop) 10001101dddddddd
Level: Sh2
Bra(Displacement12)
Tuple Fields
BRA label (Delayed branch; disp * 2 + PC + 4
→ PC
) 1010dddddddddddd
BraF(SuperHRegister)
Tuple Fields
BRA Rn (Delayed branch; Rn + PC + 4
→ PC
) 0000nnnn00100011
Level: Sh2
Bsr(Displacement12)
Tuple Fields
BSR label (Delayed branch; PC + 4
→ PR
, disp * 2 + PC + 4
→ PC
) 1011dddddddddddd
BsrF(SuperHRegister)
Tuple Fields
BSR Rn (Delayed branch; PC + 4
→ PR
, Rn + PC + 4
→ PC
) 0000nnnn00000011
Level: Sh2
Jmp(SuperHRegister)
Tuple Fields
JMP @Rn (Delayed branch; Rn
→ PC
) 0100nnnn00101011
Jsr(SuperHRegister)
Tuple Fields
JSR @Rn (Delayed branch; PC + 4
→ PR
, Rn
→ PC
) 0100nnnn00001011
Rts
RTS (Delayed branch; PR
→ PC
) 0000000000001011
ClrMac
CLRMAC (0 → MACH
, MACL
) 0000000000101000
ClrS
CLRS (0 → S
) 0000000001001000
Level: Sh3
ClrT
CLRT (0 → T
) 0000000000001000
T = 0
LdcSr(SuperHRegister)
Tuple Fields
LDC Rm,SR (Rm
→ SR
) 0100mmmm00001110
T = LSB
Privileged
LdcGbr(SuperHRegister)
Tuple Fields
LDC Rm,GBR (Rm
→ GBR
) 0100mmmm00011110
LdcVbr(SuperHRegister)
Tuple Fields
LDC Rm,VBR (Rm
→ VBR
) 0100mmmm00101110
Privileged
LdcSsr(SuperHRegister)
Tuple Fields
LDC Rm,SSR (Rm
→ SSR
) 0100mmmm00111110
Privileged Level: Sh3
LdcSpc(SuperHRegister)
Tuple Fields
LDC Rm,SPC (Rm
→ SPC
) 0100mmmm01001110
Privileged Level: Sh3
LdcDbr(SuperHRegister)
Tuple Fields
LDC Rm,DBR (Rm
→ DBR
) 0100mmmm11111010
Privileged Level: Sh4
LdcRnBank(SuperHRegister, SuperHRegisterBank)
LDC Rm,Rn_BANK (Rm
→ Rn_BANK
(n
= 0 to 7)) 0100mmmm1nnn1110
Privileged Level: Sh3
LdcLSr(SuperHRegister)
Tuple Fields
LDC.L @Rm+,SR ((Rm)
→ SR
, Rm + 4
→ Rm
) 0100mmmm00000111
T = LSB
Privileged
LdcLGbr(SuperHRegister)
Tuple Fields
LDC.L @Rm+,GBR ((Rm)
→ GBR
, Rm + 4
→ Rm
) 0100mmmm00010111
LdcLVbr(SuperHRegister)
Tuple Fields
LDC.L @Rm+,VBR ((Rm)
→ VBR
, Rm + 4
→ Rm
) 0100mmmm00100111
Privileged
LdcLSsr(SuperHRegister)
Tuple Fields
LDC.L @Rm+,SSR ((Rm)
→ SSR
, Rm + 4
→ Rm
) 0100mmmm00110111
Privileged Level: Sh3
LdcLSpc(SuperHRegister)
Tuple Fields
LDC.L @Rm+,SPC ((Rm)
→ SPC
, Rm + 4
→ Rm
) 0100mmmm01000111
Privileged Level: Sh3
LdcLDbr(SuperHRegister)
Tuple Fields
LDC.L @Rm+,DBR ((Rm)
→ DBR
, Rm + 4
→ Rm
) 0100mmmm11110110
Privileged Level: Sh4
LdcLRnBank(SuperHRegister, SuperHRegisterBank)
LDC.L @Rm+,Rn_BANK ((Rm)
→ Rn_BANK
(n
= 0 to 7), Rm + 4
→ Rm
) 0100mmmm1nnn0111
Privileged Level: Sh3
LdsMach(SuperHRegister)
Tuple Fields
LDS Rm,MACH (Rm
→ MACH
) 0100mmmm00001010
LdsMacl(SuperHRegister)
Tuple Fields
LDS Rm,MACL (Rm
→ MACL
) 0100mmmm00011010
LdsPr(SuperHRegister)
Tuple Fields
LDS Rm,PR (Rm
→ PR
) 0100mmmm00101010
LdsLMach(SuperHRegister)
Tuple Fields
LDS.L @Rm+,MACH ((Rm)
→ MACH
, Rm + 4
→ Rm
) 0100mmmm00000110
LdsLMacl(SuperHRegister)
Tuple Fields
LDS.L @Rm+,MACL ((Rm)
→ MACL
, Rm + 4
→ Rm
) 0100mmmm00010110
LdsLPr(SuperHRegister)
Tuple Fields
LDS.L @Rm+,PR ((Rm)
→ PR
, Rm + 4
→ Rm
) 0100mmmm00100110
Ldtlb
LDTLB (PTEH/PTEL
→ TLB
) 0000000000111000
Privileged Features: MMU Level: Sh3
MovcaL(SuperHRegister)
Tuple Fields
MOVCA.L R0,@Rn (R0
→ (Rn)
(without fetchingcache block)) 0000nnnn11000011
Level: Sh4
Nop
NOP (No operation) 0000000000001001
OcbI(SuperHRegister)
Tuple Fields
OCBI @Rn (Invalidates operand cache block) 0000nnnn10010011
Level: Sh4
OcbP(SuperHRegister)
Tuple Fields
OCBP @Rn (Writes back and invalidates operand cache block) 0000nnnn10100011
Level: Sh4
OcbWb(SuperHRegister)
Tuple Fields
OCBWB @Rn (Writes back operand cache block) 0000nnnn10110011
Level: Sh4
Pref(SuperHRegister)
Tuple Fields
PREF @Rn ((Rn)
→ operand cache) 0000nnnn10000011
Level: Sh3
Rte
RTE (Delayed branch; SSR/SPC
→ SR/PC
) 0000000000101011
Privileged
SetS
SETS (1 → S
) 0000000001011000
Level: Sh3
SetT
SETT (1 → T
) 0000000000011000
T = 0
Sleep
SLEEP (Sleep or standby) 0000000000011011
Privileged
StcSr(SuperHRegister)
Tuple Fields
STC SR,Rn (SR
→ Rn
) 0000nnnn00000010
Privileged
StcGbr(SuperHRegister)
Tuple Fields
STC GBR,Rn (GBR
→ Rn
) 0000nnnn00010010
StcVbr(SuperHRegister)
Tuple Fields
STC VBR,Rn (VBR
→ Rn
) 0000nnnn00100010
Privileged
StcSsr(SuperHRegister)
Tuple Fields
STC SSR,Rn (SSR
→ Rn
) 0000nnnn00110010
Privileged Level: Sh3
StcSpc(SuperHRegister)
Tuple Fields
STC SPC,Rn (SPC
→ Rn
) 0000nnnn01000010
Privileged Level: Sh3
StcSgr(SuperHRegister)
Tuple Fields
STC SGR,Rn (SGR
→ Rn
) 0000nnnn00111010
Privileged Level: Sh4
StcDbr(SuperHRegister)
Tuple Fields
STC DBR,Rn (DBR
→ Rn
) 0000nnnn11111010
Privileged Level: Sh4
StcRmBank(SuperHRegisterBank, SuperHRegister)
STC Rm_BANK,Rn (Rm_BANK
→ Rn
(m
= 0 to 7)) 0000nnnn1mmm0010
Privileged Level: Sh3
StcLSr(SuperHRegister)
Tuple Fields
STC.L SR,@-Rn (Rn - 4
→ Rn
, SR
→ (Rn)
) 0100nnnn00000011
Privileged
StcLGbr(SuperHRegister)
Tuple Fields
STC.L GBR,@-Rn (Rn - 4
→ Rn
, GBR
→ (Rn)
) 0100nnnn00010011
StcLVbr(SuperHRegister)
Tuple Fields
STC.L VBR,@-Rn (Rn - 4
→ Rn
, VBR
→ (Rn)
) 0100nnnn00100011
Privileged
StcLSsr(SuperHRegister)
Tuple Fields
STC.L SSR,@-Rn (Rn - 4
→ Rn
, SSR
→ (Rn)
) 0100nnnn00110011
Privileged Level: Sh3
StcLSpc(SuperHRegister)
Tuple Fields
STC.L SPC,@-Rn (Rn - 4
→ Rn
, SPC
→ (Rn)
) 0100nnnn01000011
Privileged Level: Sh3
StcLSgr(SuperHRegister)
Tuple Fields
STC.L SGR,@-Rn (Rn - 4
→ Rn
, SGR
→ (Rn)
) 0100nnnn00110010
Privileged Level: Sh4
StcLDbr(SuperHRegister)
Tuple Fields
STC.L DBR,@-Rn (Rn - 4
→ Rn
, DBR
→ (Rn)
) 0100nnnn11110010
Privileged Level: Sh4
StcLRmBank(SuperHRegisterBank, SuperHRegister)
STC.L Rm_BANK,@-Rn (Rn - 4
→ Rn
, Rm_BANK
→ (Rn)
(m
= 0 to 7)) 0100nnnn1mmm0011
Privileged Level: Sh3
StsMach(SuperHRegister)
Tuple Fields
STS MACH,Rn (MACH
→ Rn
) 0000nnnn00001010
StsMacl(SuperHRegister)
Tuple Fields
STS MACL,Rn (MACL
→ Rn
) 0000nnnn00011010
StsPr(SuperHRegister)
Tuple Fields
STS PR,Rn (PR
→ Rn
) 0000nnnn00101010
StsLMach(SuperHRegister)
Tuple Fields
STS.L MACH,@-Rn (Rn - 4
→ Rn
, MACH
→ (Rn)
) 0100nnnn00000010
StsLMacl(SuperHRegister)
Tuple Fields
STS.L MACL,@-Rn (Rn - 4
→ Rn
, MACL
→ (Rn)
) 0100nnnn00010010
StsLPr(SuperHRegister)
Tuple Fields
STS.L PR,@-Rn (Rn - 4
→ Rn
, PR
→ (Rn)
) 0100nnnn00100010
Trapa(u8)
Tuple Fields
0: u8
TRAPA #imm (PC + 2
→ SPC
, SR
→ SSR
, #imm << 2
→ TRA
, 0x160
→ EXPEVT
, VBR + 0x0100
→ PC
)
11000011iiiiiiii
Fldi0(SuperHFloatRegister)
Tuple Fields
FLDI0 FRn (0x00000000
→ FRn
) 1111nnnn10001101
Features: FPU Level: Sh4
Fldi1(SuperHFloatRegister)
Tuple Fields
FLDI1 FRn (0x3F800000
→ FRn
) 1111nnnn10011101
Features: FPU Level: Sh4
FMovS(SuperHFloatRegister, SuperHFloatRegister)
FMOV FRm,FRn (FRm
→ FRn
) 1111nnnnmmmm1100
Features: FPU Level: Sh4
FMovAtRegS(SuperHRegister, SuperHFloatRegister)
FMOV.S @Rm,FRn ((Rm)
→ FRn
) 1111nnnnmmmm1000
Features: FPU Level: Sh4
FMovAtIndexedRegisterS(SuperHRegister, SuperHFloatRegister)
FMOV.S @(R0,Rm),FRn ((R0 + Rm)
→ FRn
) 1111nnnnmmmm0110
Features: FPU Level: Sh4
FMovAtPostIncrementRegS(SuperHRegister, SuperHFloatRegister)
FMOV.S @Rm+,FRn ((Rm)
→ FRn
, Rm + 4
→ Rm
) 1111nnnnmmmm1001
Features: FPU Level: Sh4
FMovToAtRegS(SuperHFloatRegister, SuperHRegister)
FMOV.S FRm,@Rn (FRm
→ (Rn)
) 1111nnnnmmmm1010
Features: FPU Level: Sh4
FMovToAtPreDecrementRegS(SuperHFloatRegister, SuperHRegister)
FMOV.S FRm,@-Rn (Rn - 4
→ Rn
, FRm
→ (Rn)
) 1111nnnnmmmm1011
Features: FPU Level: Sh4
FMovToAtIndexedRegisterS(SuperHFloatRegister, SuperHRegister)
FMOV.S FRm,@(R0,Rn) (FRm
→ (R0 + Rn)
) 1111nnnnmmmm0111
Features: FPU Level: Sh4
FMov(SuperHDoubleRegister, SuperHDoubleRegister)
FMOV DRm,DRn (DRm
→ DRn
) 1111nnn0mmm01100
Features: FPU Level: Sh4
FMovAtReg(SuperHRegister, SuperHDoubleRegister)
FMOV @Rm,DRn ((Rm)
→ DRn
) 1111nnn0mmmm1000
Features: FPU Level: Sh4
FMovAtIndexedRegister(SuperHRegister, SuperHDoubleRegister)
FMOV @(R0,Rm),DRn ((R0 + Rm)
→ DRn
) 1111nnn0mmmm0110
Features: FPU Level: Sh4
FMovAtPostIncrementReg(SuperHRegister, SuperHDoubleRegister)
FMOV @Rm+,DRn ((Rm)
→ DRn
, Rm + 8
→ Rm
) 1111nnn0mmmm1001
Features: FPU Level: Sh4
FMovToAtReg(SuperHDoubleRegister, SuperHRegister)
FMOV DRm,@Rn (DRm
→ (Rn)
) 1111nnnnmmm01010
Features: FPU Level: Sh4
FMovToAtPreDecrementReg(SuperHDoubleRegister, SuperHRegister)
FMOV DRm,@-Rn (Rn - 8
→ Rn
, DRm
→ (Rn)
) 1111nnnnmmm01011
Features: FPU Level: Sh4
FMovToAtIndexedRegister(SuperHDoubleRegister, SuperHRegister)
FMOV DRm,@(R0,Rn) (DRm
→ (R0 + Rn)
) 1111nnnnmmm00111
Features: FPU Level: Sh4
Flds(SuperHFloatRegister)
Tuple Fields
FLDS FRm,FPUL (FRm
→ FPUL
) 1111mmmm00011101
Features: FPU Level: Sh4
Fsts(SuperHFloatRegister)
Tuple Fields
FSTS FPUL,FRn (FPUL
→ FRn
) 1111nnnn00001101
Features: FPU Level: Sh4
FabsS(SuperHFloatRegister)
Tuple Fields
FABS FRn (FRn & 0x7FFF_FFFF
→ FRn
) 1111nnnn01011101
Features: FPU Level: Sh4
FaddS(SuperHFloatRegister, SuperHFloatRegister)
FADD FRm,FRn (FRn + FRm
→ FRn
) 1111nnnnmmmm0000
Features: FPU Level: Sh4
FcmpEqS(SuperHFloatRegister, SuperHFloatRegister)
FCMP/EQ FRm,FRn (When FRn
= FRm
, 1 → T
; Otherwise, 0 → T
) 1111nnnnmmmm0100
T = Comparison result
Features: FPU Level: Sh4
FcmpGtS(SuperHFloatRegister, SuperHFloatRegister)
FCMP/GT FRm,FRn (When FRn
> FRm
, 1 → T
; Otherwise, 0 → T
) 1111nnnnmmmm0101
T = Comparison result
Features: FPU Level: Sh4
FdivS(SuperHFloatRegister, SuperHFloatRegister)
FDIV FRm,FRn (FRn / FRm
→ FRn
) 1111nnnnmmmm0011
Features: FPU Level: Sh4
FloatS(SuperHFloatRegister)
Tuple Fields
FLOAT FPUL,FRn ((float)FPUL
→ FRn
) 1111nnnn00101101
Features: FPU Level: Sh4
Fmac(SuperHFloatRegister, SuperHFloatRegister)
FMAC FR0,FRm,FRn (FR0 * FRm + FRn
→ FRn
) 1111nnnnmmmm1110
Features: FPU Level: Sh4
FmulS(SuperHFloatRegister, SuperHFloatRegister)
FMUL FRm,FRn (FRn * FRm
→ FRn
) 1111nnnnmmmm0010
Features: FPU Level: Sh4
FnegS(SuperHFloatRegister)
Tuple Fields
FNEG FRn (FRn ^ 0x8000_0000
→ FRn
) 1111nnnn01001101
Features: FPU Level: Sh4
FsqrtS(SuperHFloatRegister)
Tuple Fields
FSQRT FRn (√FRn
→ FRn
) 1111nnnn01101101
Features: FPU Level: Sh4
FsubS(SuperHFloatRegister, SuperHFloatRegister)
FSUB FRm,FRn (FRn - FRm
→ FRn
) 1111nnnnmmmm0001
Features: FPU Level: Sh4
FrtcS(SuperHFloatRegister)
Tuple Fields
FRTC FPUL,FRm ((long)FRm
→ FPUL
) 1111mmmm00111101
Features: FPU Level: Sh4
Fabs(SuperHDoubleRegister)
Tuple Fields
FABS DRn (DRn & 0x7FFF_FFFF_FFFF_FFFF
→ DRn
) 1111nnn001011101
Features: FPU Level: Sh4
Fadd(SuperHDoubleRegister, SuperHDoubleRegister)
FADD DRm,DRn (DRn + DRm
→ DRn
) 1111nnn0mmm00000
Features: FPU Level: Sh4
FcmpEq(SuperHDoubleRegister, SuperHDoubleRegister)
FCMP/EQ DRm,DRn (When DRn
= DRm
, 1 → T
; Otherwise, 0 → T
) 1111nnn0mmm00100
T = Comparison result
Features: FPU Level: Sh4
FcmpGt(SuperHDoubleRegister, SuperHDoubleRegister)
FCMP/GT DRm,DRn (When DRn
> DRm
, 1 → T
; Otherwise, 0 → T
) 1111nnn0mmm00101
T = Comparison result
Features: FPU Level: Sh4
Fdiv(SuperHDoubleRegister, SuperHDoubleRegister)
FDIV DRm,DRn (DRn / DRm
→ DRn
) 1111nnn0mmm00011
Features: FPU Level: Sh4
FcnvDs(SuperHDoubleRegister)
Tuple Fields
FCNVDS DRm,FPUL (double_to_float[DRm]
→ FPUL
) 1111mmm010111101
Features: FPU Level: Sh4
FcnvSd(SuperHDoubleRegister)
Tuple Fields
FCNVSD FPUL,DRn (float_to_double[FPUL]
→ DRn
) 1111nnn010101101
Features: FPU Level: Sh4
Float(SuperHDoubleRegister)
Tuple Fields
FLOAT FPUL,DRn ((float)FPUL
→ DRn
) 1111nnn000101101
Features: FPU Level: Sh4
Fmul(SuperHDoubleRegister, SuperHDoubleRegister)
FMUL DRm,DRn (DRn * DRm
→ DRn
) 1111nnn0mmm00010
Features: FPU Level: Sh4
Fneg(SuperHDoubleRegister)
Tuple Fields
FNEG DRn (DRn ^ 0x8000_0000_0000_0000
→ DRn
) 1111nnn001001101
Features: FPU Level: Sh4
Fsqrt(SuperHDoubleRegister)
Tuple Fields
FSQRT DRn (√DRn
→ DRn
) 1111nnn001101101
Features: FPU Level: Sh4
Fsub(SuperHDoubleRegister, SuperHDoubleRegister)
FSUB DRm,DRn (DRn - DRm
→ DRn
) 1111nnn0mmm00001
Features: FPU Level: Sh4
Frtc(SuperHDoubleRegister)
Tuple Fields
FRTC FPUL,DRm ((long)DRm
→ FPUL
) 1111mmm000111101
Features: FPU Level: Sh4
LdsFpscr(SuperHRegister)
Tuple Fields
LDS Rm,FPSCR (Rm
→ FPSCR
) 0100mmmm01101010
Features: FPU Level: Sh4
LdsFpul(SuperHRegister)
Tuple Fields
LDS Rm,FPUL (Rm
→ FPUL
) 0100mmmm01011010
Features: FPU Level: Sh4
LdsFpscrL(SuperHRegister)
Tuple Fields
LDS @Rm+,FPSCR (Rm
→ FPSCR
, Rm + 4
→ Rm
) 0100mmmm01100110
Features: FPU Level: Sh4
LdsFpulL(SuperHRegister)
Tuple Fields
LDS @Rm+,FPUL (Rm
→ FPUL
, Rm + 4
→ Rm
) 0100mmmm01010110
Features: FPU Level: Sh4
StsFpscr(SuperHRegister)
Tuple Fields
STS FPSCR,Rn (FPSCR
→ Rn
) 0000nnnn01101010
Features: FPU Level: Sh4
StsFpul(SuperHRegister)
Tuple Fields
STS FPUL,Rn (FPUL
→ Rn
) 0000nnnn01011010
Features: FPU Level: Sh4
StsFpscrL(SuperHRegister)
Tuple Fields
STS FPSCR,@-Rn (Rn - 4
→ Rn
, FPSCR
→ Rn
) 0100nnnn01100010
Features: FPU Level: Sh4
StsFpulL(SuperHRegister)
Tuple Fields
STS FPUL,@-Rn (Rn - 4
→ Rn
, FPUL
→ Rn
) 0100nnnn01010010
Features: FPU Level: Sh4
FMovToX(SuperHDoubleRegister, SuperHExtendedDoubleRegister)
FMOV DRm,XDn (DRm
→ XDn
) 1111nnn1mmm01100
Features: FPU Level: Sh4
FMovFromX(SuperHExtendedDoubleRegister, SuperHDoubleRegister)
FMOV XDm,DRn (XDm
→ DRn
) 1111nnn0mmm11100
Features: FPU Level: Sh4
FMovX(SuperHExtendedDoubleRegister, SuperHExtendedDoubleRegister)
FMOV XDm,XDn (XDm
→ XDn
) 1111nnn1mmm11100
Features: FPU Level: Sh4
FMovAtRegX(SuperHRegister, SuperHExtendedDoubleRegister)
FMOV @Rm,XDn ((Rm)
→ XDn
) 1111nnn1mmmm1000
Features: FPU Level: Sh4
FMovAtPostIncrementRegX(SuperHRegister, SuperHExtendedDoubleRegister)
FMOV @Rm+,XDn ((Rm)
→ XDn
, Rm + 8
→ Rm
) 1111nnn1mmmm1001
Features: FPU Level: Sh4
FMovAtIndexedRegisterX(SuperHRegister, SuperHExtendedDoubleRegister)
FMOV @(R0,Rm),XDn ((R0 + Rm)
→ XDn
) 1111nnn1mmmm0110
Features: FPU Level: Sh4
FMovToAtRegX(SuperHExtendedDoubleRegister, SuperHRegister)
FMOV XDm,@Rn (XDm
→ (Rn)
) 1111nnnnmmm11010
Features: FPU Level: Sh4
FMovToAtPreDecrementRegX(SuperHExtendedDoubleRegister, SuperHRegister)
FMOV XDm,@-Rn (Rn - 8
→ Rn
, XDm
→ (Rn)
) 1111nnnnmmm11011
Features: FPU Level: Sh4
FMovToAtIndexedRegisterX(SuperHExtendedDoubleRegister, SuperHRegister)
FMOV XDm,@(R0,Rn) (XDm
→ (R0 + Rn)
) 1111nnnnmmm10111
Features: FPU Level: Sh4
Fipr(SuperHVectorFloatRegister, SuperHVectorFloatRegister)
FIPR FVm,FVn (inner_product[FVm, FVn]
→ FR[n + 3]
) 1111nnmm11101101
Features: FPU Level: Sh4
Xmrtx(SuperHVectorFloatRegister)
Tuple Fields
XMRTX FVn (transform_vector[XMTRX, FVn]
→ FVn
) 1111nn0111111101
Features: FPU Level: Sh4
FrChg
FRCHG (~FPSCR.FR
→ SPFCR.FR
) 1111101111111101
Features: FPU Level: Sh4
FsChg
FSCHG (~FPSCR.SZ
→ SPFCR.SZ
) 1111001111111101
Features: FPU Level: Sh4
CasL(SuperHRegister, SuperHRegister)
CAS.L Rm,Rn,@R0 (When a byte in Rn equals a byte in Rm, 1 → T
) 0010nnnnmmmm0011
https://github.com/j-core/jcore-cpu/blob/00f398e/decode/decode_table_simple.vhd#L1919
Features: J2 Level: J2
Implementations
impl SuperHInstruction
impl SuperHInstruction
pub fn features(self) -> SuperHFeatures
impl SuperHInstruction
impl SuperHInstruction
pub fn level(self) -> SuperHLevel
impl SuperHInstruction
impl SuperHInstruction
pub fn is_privileged(self) -> bool
Trait Implementations
Returns the “default value” for a type. Read more
impl Display for SuperHInstruction
impl Display for SuperHInstruction
impl Into<u16> for SuperHInstruction
impl Into<u16> for SuperHInstruction
type Unit = AddressDiff<u32>
the length, in terms of Unit
, of this instruction. because Unit
will be a diff of an
architecture’s Address
type, this almost always is a number of bytes. implementations
should indicate if this is ever not the case. Read more
the length, in terms of Unit
, of the shortest possible instruction in a given
architecture.. because Unit
will be a diff of an architecture’s Address
type, this
almost always is a number of bytes. implementations should indicate if this is ever not the
case. Read more
This method tests for self
and other
values to be equal, and is used
by ==
. Read more
This method tests for !=
.
This method returns an ordering between self
and other
values if one exists. Read more
This method tests less than (for self
and other
) and is used by the <
operator. Read more
This method tests less than or equal to (for self
and other
) and is used by the <=
operator. Read more
This method tests greater than (for self
and other
) and is used by the >
operator. Read more
Auto Trait Implementations
impl RefUnwindSafe for SuperHInstruction
impl Send for SuperHInstruction
impl Sync for SuperHInstruction
impl Unpin for SuperHInstruction
impl UnwindSafe for SuperHInstruction
Blanket Implementations
Mutably borrows from an owned value. Read more