1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
#![no_std]
#![allow(asm_sub_register)]
#![feature(asm_experimental_arch)]
use core::arch::asm;
pub mod interrupt;
pub mod mutex;
pub mod timer;
#[macro_use]
mod macros;
#[inline]
pub unsafe fn set_vecbase(base: *const u32) {
asm!("wsr.vecbase {0}", in(reg) base, options(nostack));
}
#[inline(always)]
pub fn get_stack_pointer() -> *const u32 {
let x: *const u32;
unsafe { asm!("mov {0}, sp", out(reg) x, options(nostack)) };
x
}
#[inline(always)]
pub unsafe fn set_stack_pointer(stack: *mut u32) {
asm!(
"movi a0, 0", "mov sp, {0}", in(reg) stack, options(nostack)
);
}
#[inline(always)]
pub fn get_program_counter() -> *const u32 {
let x: *const u32;
unsafe {
asm!("
mov {1}, {2}
call0 1f
.align 4
1:
mov {0}, {2}
mov {2}, {1}
", out(reg) x, out(reg) _, out(reg) _, options(nostack))
};
x
}
#[inline]
pub fn get_processor_id() -> u32 {
let mut x: u32;
unsafe { asm!("rsr.prid {0}", out(reg) x, options(nostack)) };
x
}
const XDM_OCD_DCR_SET: u32 = 0x10200C;
const DCR_ENABLEOCD: u32 = 0x01;
#[inline]
pub fn is_debugger_attached() -> bool {
let mut x: u32;
unsafe { asm!("rer {0}, {1}", out(reg) x, in(reg) XDM_OCD_DCR_SET, options(nostack)) };
(x & DCR_ENABLEOCD) != 0
}
#[inline(always)]
pub fn debug_break() {
unsafe { asm!("break 1, 15", options(nostack)) };
}