Crate xpile_ptx_codegen 

PTX backend.

Lowers Rust meta-HIR (functions annotated #[gpu_kernel(...)]) to NVIDIA PTX text targeting sm_80+. Layer 5 compile contract: contracts/compile-rust-to-ptx-mma-v1.yaml.

Architecture (PMAT-264 / Section 29): PtxBackend wraps a MultiEmitterBackend so emission routes through the same general/specialist quorum framework that will eventually carry rustc_codegen_nvvm (general) + aprender-gpu (specialist). At v0.1.0 the wrapper holds a single [ScaffoldPtxEmitter] in the general slot — the same code path real emitters will plug into.

When rustc_codegen_nvvm lights up (next phase per sub/layer5-multi-emitter-quorum.md), it slots into the general position; when aprender-gpu ships its bridge, it slots into the specialist position; no changes to PtxBackend’s public API.

Structs

PtxBackend

PTX backend — Backend impl wrapping a MultiEmitterBackend so the v0.1.0 scaffold drives through the same routing the future rustc_codegen_nvvm + aprender-gpu quorum will use.

Enums

PtxValidationError

Reasons emitted PTX text fails the validate_ptx well-formedness gate.

Functions

ptx_looks_real

true when text looks like real PTX (carries a .version directive) rather than the v0.1.0 scaffold comment placeholder.

ptxas_arch

The ptxas -arch=<…> value for a PTX .target compute capability — derived, never hard-coded (PMAT-481). The ptxas assemble step (free CI, wired with the real emitter in PMAT-485) uses this so the assembled arch always matches the emitted .target.

validate_ptx

PMAT-481 — structural well-formedness check on emitted PTX text: .version, .target matching compute_capability, .address_size 64, and at least one .visible .entry. Pure text — no GPU, no ptxas. Gate on ptx_looks_real first so the scaffold placeholder is not treated as real emission.