1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 _reserved0: [u8; 0x04],
5 ccfg: CCFG,
6 _reserved1: [u8; 0x04],
7 kscfg: KSCFG,
8 fdr: FDR,
9 brg: BRG,
10 inpr: INPR,
11 dx0cr: DX0CR,
12 dx1cr: DX1CR,
13 dx2cr: DX2CR,
14 dx3cr: DX3CR,
15 dx4cr: DX4CR,
16 dx5cr: DX5CR,
17 sctr: SCTR,
18 tcsr: TCSR,
19 _reserved_13_pcr: [u8; 0x04],
20 ccr: CCR,
21 cmtr: CMTR,
22 _reserved_16_psr: [u8; 0x04],
23 pscr: PSCR,
24 rbufsr: RBUFSR,
25 rbuf: RBUF,
26 rbufd: RBUFD,
27 rbuf0: RBUF0,
28 rbuf1: RBUF1,
29 rbuf01sr: RBUF01SR,
30 fmr: FMR,
31 _reserved25: [u8; 0x14],
32 tbuf: [TBUF; 32],
33 byp: BYP,
34 bypcr: BYPCR,
35 tbctr: TBCTR,
36 rbctr: RBCTR,
37 trbptr: TRBPTR,
38 trbsr: TRBSR,
39 trbscr: TRBSCR,
40 outr: OUTR,
41 outdr: OUTDR,
42 _reserved35: [u8; 0x5c],
43 in_: [IN; 32],
44}
45impl RegisterBlock {
46 #[doc = "0x04 - Channel Configuration Register"]
47 #[inline(always)]
48 pub const fn ccfg(&self) -> &CCFG {
49 &self.ccfg
50 }
51 #[doc = "0x0c - Kernel State Configuration Register"]
52 #[inline(always)]
53 pub const fn kscfg(&self) -> &KSCFG {
54 &self.kscfg
55 }
56 #[doc = "0x10 - Fractional Divider Register"]
57 #[inline(always)]
58 pub const fn fdr(&self) -> &FDR {
59 &self.fdr
60 }
61 #[doc = "0x14 - Baud Rate Generator Register"]
62 #[inline(always)]
63 pub const fn brg(&self) -> &BRG {
64 &self.brg
65 }
66 #[doc = "0x18 - Interrupt Node Pointer Register"]
67 #[inline(always)]
68 pub const fn inpr(&self) -> &INPR {
69 &self.inpr
70 }
71 #[doc = "0x1c - Input Control Register 0"]
72 #[inline(always)]
73 pub const fn dx0cr(&self) -> &DX0CR {
74 &self.dx0cr
75 }
76 #[doc = "0x20 - Input Control Register 1"]
77 #[inline(always)]
78 pub const fn dx1cr(&self) -> &DX1CR {
79 &self.dx1cr
80 }
81 #[doc = "0x24 - Input Control Register 2"]
82 #[inline(always)]
83 pub const fn dx2cr(&self) -> &DX2CR {
84 &self.dx2cr
85 }
86 #[doc = "0x28 - Input Control Register 3"]
87 #[inline(always)]
88 pub const fn dx3cr(&self) -> &DX3CR {
89 &self.dx3cr
90 }
91 #[doc = "0x2c - Input Control Register 4"]
92 #[inline(always)]
93 pub const fn dx4cr(&self) -> &DX4CR {
94 &self.dx4cr
95 }
96 #[doc = "0x30 - Input Control Register 5"]
97 #[inline(always)]
98 pub const fn dx5cr(&self) -> &DX5CR {
99 &self.dx5cr
100 }
101 #[doc = "0x34 - Shift Control Register"]
102 #[inline(always)]
103 pub const fn sctr(&self) -> &SCTR {
104 &self.sctr
105 }
106 #[doc = "0x38 - Transmit Control/Status Register"]
107 #[inline(always)]
108 pub const fn tcsr(&self) -> &TCSR {
109 &self.tcsr
110 }
111 #[doc = "0x3c - Protocol Control Register \\[IIS Mode\\]"]
112 #[inline(always)]
113 pub const fn pcr_iismode(&self) -> &PCR_IISMODE {
114 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
115 }
116 #[doc = "0x3c - Protocol Control Register \\[IIC Mode\\]"]
117 #[inline(always)]
118 pub const fn pcr_iicmode(&self) -> &PCR_IICMODE {
119 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
120 }
121 #[doc = "0x3c - Protocol Control Register \\[SSC Mode\\]"]
122 #[inline(always)]
123 pub const fn pcr_sscmode(&self) -> &PCR_SSCMODE {
124 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
125 }
126 #[doc = "0x3c - Protocol Control Register \\[ASC Mode\\]"]
127 #[inline(always)]
128 pub const fn pcr_ascmode(&self) -> &PCR_ASCMODE {
129 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
130 }
131 #[doc = "0x3c - Protocol Control Register"]
132 #[inline(always)]
133 pub const fn pcr(&self) -> &PCR {
134 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(60).cast() }
135 }
136 #[doc = "0x40 - Channel Control Register"]
137 #[inline(always)]
138 pub const fn ccr(&self) -> &CCR {
139 &self.ccr
140 }
141 #[doc = "0x44 - Capture Mode Timer Register"]
142 #[inline(always)]
143 pub const fn cmtr(&self) -> &CMTR {
144 &self.cmtr
145 }
146 #[doc = "0x48 - Protocol Status Register \\[IIS Mode\\]"]
147 #[inline(always)]
148 pub const fn psr_iismode(&self) -> &PSR_IISMODE {
149 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
150 }
151 #[doc = "0x48 - Protocol Status Register \\[IIC Mode\\]"]
152 #[inline(always)]
153 pub const fn psr_iicmode(&self) -> &PSR_IICMODE {
154 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
155 }
156 #[doc = "0x48 - Protocol Status Register \\[SSC Mode\\]"]
157 #[inline(always)]
158 pub const fn psr_sscmode(&self) -> &PSR_SSCMODE {
159 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
160 }
161 #[doc = "0x48 - Protocol Status Register \\[ASC Mode\\]"]
162 #[inline(always)]
163 pub const fn psr_ascmode(&self) -> &PSR_ASCMODE {
164 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
165 }
166 #[doc = "0x48 - Protocol Status Register"]
167 #[inline(always)]
168 pub const fn psr(&self) -> &PSR {
169 unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(72).cast() }
170 }
171 #[doc = "0x4c - Protocol Status Clear Register"]
172 #[inline(always)]
173 pub const fn pscr(&self) -> &PSCR {
174 &self.pscr
175 }
176 #[doc = "0x50 - Receiver Buffer Status Register"]
177 #[inline(always)]
178 pub const fn rbufsr(&self) -> &RBUFSR {
179 &self.rbufsr
180 }
181 #[doc = "0x54 - Receiver Buffer Register"]
182 #[inline(always)]
183 pub const fn rbuf(&self) -> &RBUF {
184 &self.rbuf
185 }
186 #[doc = "0x58 - Receiver Buffer Register for Debugger"]
187 #[inline(always)]
188 pub const fn rbufd(&self) -> &RBUFD {
189 &self.rbufd
190 }
191 #[doc = "0x5c - Receiver Buffer Register 0"]
192 #[inline(always)]
193 pub const fn rbuf0(&self) -> &RBUF0 {
194 &self.rbuf0
195 }
196 #[doc = "0x60 - Receiver Buffer Register 1"]
197 #[inline(always)]
198 pub const fn rbuf1(&self) -> &RBUF1 {
199 &self.rbuf1
200 }
201 #[doc = "0x64 - Receiver Buffer 01 Status Register"]
202 #[inline(always)]
203 pub const fn rbuf01sr(&self) -> &RBUF01SR {
204 &self.rbuf01sr
205 }
206 #[doc = "0x68 - Flag Modification Register"]
207 #[inline(always)]
208 pub const fn fmr(&self) -> &FMR {
209 &self.fmr
210 }
211 #[doc = "0x80..0x100 - Transmit Buffer"]
212 #[inline(always)]
213 pub const fn tbuf(&self, n: usize) -> &TBUF {
214 &self.tbuf[n]
215 }
216 #[doc = "Iterator for array of:"]
217 #[doc = "0x80..0x100 - Transmit Buffer"]
218 #[inline(always)]
219 pub fn tbuf_iter(&self) -> impl Iterator<Item = &TBUF> {
220 self.tbuf.iter()
221 }
222 #[doc = "0x100 - Bypass Data Register"]
223 #[inline(always)]
224 pub const fn byp(&self) -> &BYP {
225 &self.byp
226 }
227 #[doc = "0x104 - Bypass Control Register"]
228 #[inline(always)]
229 pub const fn bypcr(&self) -> &BYPCR {
230 &self.bypcr
231 }
232 #[doc = "0x108 - Transmitter Buffer Control Register"]
233 #[inline(always)]
234 pub const fn tbctr(&self) -> &TBCTR {
235 &self.tbctr
236 }
237 #[doc = "0x10c - Receiver Buffer Control Register"]
238 #[inline(always)]
239 pub const fn rbctr(&self) -> &RBCTR {
240 &self.rbctr
241 }
242 #[doc = "0x110 - Transmit/Receive Buffer Pointer Register"]
243 #[inline(always)]
244 pub const fn trbptr(&self) -> &TRBPTR {
245 &self.trbptr
246 }
247 #[doc = "0x114 - Transmit/Receive Buffer Status Register"]
248 #[inline(always)]
249 pub const fn trbsr(&self) -> &TRBSR {
250 &self.trbsr
251 }
252 #[doc = "0x118 - Transmit/Receive Buffer Status Clear Register"]
253 #[inline(always)]
254 pub const fn trbscr(&self) -> &TRBSCR {
255 &self.trbscr
256 }
257 #[doc = "0x11c - Receiver Buffer Output Register"]
258 #[inline(always)]
259 pub const fn outr(&self) -> &OUTR {
260 &self.outr
261 }
262 #[doc = "0x120 - Receiver Buffer Output Register L for Debugger"]
263 #[inline(always)]
264 pub const fn outdr(&self) -> &OUTDR {
265 &self.outdr
266 }
267 #[doc = "0x180..0x200 - Transmit FIFO Buffer"]
268 #[inline(always)]
269 pub const fn in_(&self, n: usize) -> &IN {
270 &self.in_[n]
271 }
272 #[doc = "Iterator for array of:"]
273 #[doc = "0x180..0x200 - Transmit FIFO Buffer"]
274 #[inline(always)]
275 pub fn in__iter(&self) -> impl Iterator<Item = &IN> {
276 self.in_.iter()
277 }
278}
279#[doc = "CCFG (r) register accessor: Channel Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccfg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccfg`]
280module"]
281pub type CCFG = crate::Reg<ccfg::CCFG_SPEC>;
282#[doc = "Channel Configuration Register"]
283pub mod ccfg;
284#[doc = "KSCFG (rw) register accessor: Kernel State Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`kscfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`kscfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@kscfg`]
285module"]
286pub type KSCFG = crate::Reg<kscfg::KSCFG_SPEC>;
287#[doc = "Kernel State Configuration Register"]
288pub mod kscfg;
289#[doc = "FDR (rw) register accessor: Fractional Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`]
290module"]
291pub type FDR = crate::Reg<fdr::FDR_SPEC>;
292#[doc = "Fractional Divider Register"]
293pub mod fdr;
294#[doc = "BRG (rw) register accessor: Baud Rate Generator Register\n\nYou can [`read`](crate::Reg::read) this register and get [`brg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`brg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brg`]
295module"]
296pub type BRG = crate::Reg<brg::BRG_SPEC>;
297#[doc = "Baud Rate Generator Register"]
298pub mod brg;
299#[doc = "INPR (rw) register accessor: Interrupt Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`inpr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inpr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inpr`]
300module"]
301pub type INPR = crate::Reg<inpr::INPR_SPEC>;
302#[doc = "Interrupt Node Pointer Register"]
303pub mod inpr;
304#[doc = "DX0CR (rw) register accessor: Input Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`dx0cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx0cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx0cr`]
305module"]
306pub type DX0CR = crate::Reg<dx0cr::DX0CR_SPEC>;
307#[doc = "Input Control Register 0"]
308pub mod dx0cr;
309#[doc = "DX1CR (rw) register accessor: Input Control Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dx1cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx1cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx1cr`]
310module"]
311pub type DX1CR = crate::Reg<dx1cr::DX1CR_SPEC>;
312#[doc = "Input Control Register 1"]
313pub mod dx1cr;
314#[doc = "DX2CR (rw) register accessor: Input Control Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`dx2cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx2cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx2cr`]
315module"]
316pub type DX2CR = crate::Reg<dx2cr::DX2CR_SPEC>;
317#[doc = "Input Control Register 2"]
318pub mod dx2cr;
319#[doc = "DX3CR (rw) register accessor: Input Control Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`dx3cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx3cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx3cr`]
320module"]
321pub type DX3CR = crate::Reg<dx3cr::DX3CR_SPEC>;
322#[doc = "Input Control Register 3"]
323pub mod dx3cr;
324#[doc = "DX4CR (rw) register accessor: Input Control Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`dx4cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx4cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx4cr`]
325module"]
326pub type DX4CR = crate::Reg<dx4cr::DX4CR_SPEC>;
327#[doc = "Input Control Register 4"]
328pub mod dx4cr;
329#[doc = "DX5CR (rw) register accessor: Input Control Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`dx5cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dx5cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx5cr`]
330module"]
331pub type DX5CR = crate::Reg<dx5cr::DX5CR_SPEC>;
332#[doc = "Input Control Register 5"]
333pub mod dx5cr;
334#[doc = "SCTR (rw) register accessor: Shift Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sctr`]
335module"]
336pub type SCTR = crate::Reg<sctr::SCTR_SPEC>;
337#[doc = "Shift Control Register"]
338pub mod sctr;
339#[doc = "TCSR (rw) register accessor: Transmit Control/Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tcsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tcsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcsr`]
340module"]
341pub type TCSR = crate::Reg<tcsr::TCSR_SPEC>;
342#[doc = "Transmit Control/Status Register"]
343pub mod tcsr;
344#[doc = "PCR (rw) register accessor: Protocol Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr`]
345module"]
346pub type PCR = crate::Reg<pcr::PCR_SPEC>;
347#[doc = "Protocol Control Register"]
348pub mod pcr;
349#[doc = "PCR_ASCMode (rw) register accessor: Protocol Control Register \\[ASC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_ascmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_ascmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_ascmode`]
350module"]
351#[doc(alias = "PCR_ASCMode")]
352pub type PCR_ASCMODE = crate::Reg<pcr_ascmode::PCR_ASCMODE_SPEC>;
353#[doc = "Protocol Control Register \\[ASC Mode\\]"]
354pub mod pcr_ascmode;
355#[doc = "PCR_SSCMode (rw) register accessor: Protocol Control Register \\[SSC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_sscmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_sscmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_sscmode`]
356module"]
357#[doc(alias = "PCR_SSCMode")]
358pub type PCR_SSCMODE = crate::Reg<pcr_sscmode::PCR_SSCMODE_SPEC>;
359#[doc = "Protocol Control Register \\[SSC Mode\\]"]
360pub mod pcr_sscmode;
361#[doc = "PCR_IICMode (rw) register accessor: Protocol Control Register \\[IIC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_iicmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_iicmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iicmode`]
362module"]
363#[doc(alias = "PCR_IICMode")]
364pub type PCR_IICMODE = crate::Reg<pcr_iicmode::PCR_IICMODE_SPEC>;
365#[doc = "Protocol Control Register \\[IIC Mode\\]"]
366pub mod pcr_iicmode;
367#[doc = "PCR_IISMode (rw) register accessor: Protocol Control Register \\[IIS Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`pcr_iismode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcr_iismode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iismode`]
368module"]
369#[doc(alias = "PCR_IISMode")]
370pub type PCR_IISMODE = crate::Reg<pcr_iismode::PCR_IISMODE_SPEC>;
371#[doc = "Protocol Control Register \\[IIS Mode\\]"]
372pub mod pcr_iismode;
373#[doc = "CCR (rw) register accessor: Channel Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`]
374module"]
375pub type CCR = crate::Reg<ccr::CCR_SPEC>;
376#[doc = "Channel Control Register"]
377pub mod ccr;
378#[doc = "CMTR (rw) register accessor: Capture Mode Timer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cmtr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmtr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmtr`]
379module"]
380pub type CMTR = crate::Reg<cmtr::CMTR_SPEC>;
381#[doc = "Capture Mode Timer Register"]
382pub mod cmtr;
383#[doc = "PSR (rw) register accessor: Protocol Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`psr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr`]
384module"]
385pub type PSR = crate::Reg<psr::PSR_SPEC>;
386#[doc = "Protocol Status Register"]
387pub mod psr;
388#[doc = "PSR_ASCMode (rw) register accessor: Protocol Status Register \\[ASC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_ascmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_ascmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_ascmode`]
389module"]
390#[doc(alias = "PSR_ASCMode")]
391pub type PSR_ASCMODE = crate::Reg<psr_ascmode::PSR_ASCMODE_SPEC>;
392#[doc = "Protocol Status Register \\[ASC Mode\\]"]
393pub mod psr_ascmode;
394#[doc = "PSR_SSCMode (rw) register accessor: Protocol Status Register \\[SSC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_sscmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_sscmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_sscmode`]
395module"]
396#[doc(alias = "PSR_SSCMode")]
397pub type PSR_SSCMODE = crate::Reg<psr_sscmode::PSR_SSCMODE_SPEC>;
398#[doc = "Protocol Status Register \\[SSC Mode\\]"]
399pub mod psr_sscmode;
400#[doc = "PSR_IICMode (rw) register accessor: Protocol Status Register \\[IIC Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_iicmode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_iicmode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iicmode`]
401module"]
402#[doc(alias = "PSR_IICMode")]
403pub type PSR_IICMODE = crate::Reg<psr_iicmode::PSR_IICMODE_SPEC>;
404#[doc = "Protocol Status Register \\[IIC Mode\\]"]
405pub mod psr_iicmode;
406#[doc = "PSR_IISMode (rw) register accessor: Protocol Status Register \\[IIS Mode\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`psr_iismode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`psr_iismode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iismode`]
407module"]
408#[doc(alias = "PSR_IISMode")]
409pub type PSR_IISMODE = crate::Reg<psr_iismode::PSR_IISMODE_SPEC>;
410#[doc = "Protocol Status Register \\[IIS Mode\\]"]
411pub mod psr_iismode;
412#[doc = "PSCR (w) register accessor: Protocol Status Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pscr`]
413module"]
414pub type PSCR = crate::Reg<pscr::PSCR_SPEC>;
415#[doc = "Protocol Status Clear Register"]
416pub mod pscr;
417#[doc = "RBUFSR (r) register accessor: Receiver Buffer Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbufsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufsr`]
418module"]
419pub type RBUFSR = crate::Reg<rbufsr::RBUFSR_SPEC>;
420#[doc = "Receiver Buffer Status Register"]
421pub mod rbufsr;
422#[doc = "RBUF (r) register accessor: Receiver Buffer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n<div class=\"warning\">One or more dependent resources other than the current register are immediately affected by a read operation.</div>\n\nFor information about available fields see [`mod@rbuf`]
423module"]
424pub type RBUF = crate::Reg<rbuf::RBUF_SPEC>;
425#[doc = "Receiver Buffer Register"]
426pub mod rbuf;
427#[doc = "RBUFD (r) register accessor: Receiver Buffer Register for Debugger\n\nYou can [`read`](crate::Reg::read) this register and get [`rbufd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufd`]
428module"]
429pub type RBUFD = crate::Reg<rbufd::RBUFD_SPEC>;
430#[doc = "Receiver Buffer Register for Debugger"]
431pub mod rbufd;
432#[doc = "RBUF0 (r) register accessor: Receiver Buffer Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf0`]
433module"]
434pub type RBUF0 = crate::Reg<rbuf0::RBUF0_SPEC>;
435#[doc = "Receiver Buffer Register 0"]
436pub mod rbuf0;
437#[doc = "RBUF1 (r) register accessor: Receiver Buffer Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf1`]
438module"]
439pub type RBUF1 = crate::Reg<rbuf1::RBUF1_SPEC>;
440#[doc = "Receiver Buffer Register 1"]
441pub mod rbuf1;
442#[doc = "RBUF01SR (r) register accessor: Receiver Buffer 01 Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbuf01sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf01sr`]
443module"]
444pub type RBUF01SR = crate::Reg<rbuf01sr::RBUF01SR_SPEC>;
445#[doc = "Receiver Buffer 01 Status Register"]
446pub mod rbuf01sr;
447#[doc = "FMR (w) register accessor: Flag Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fmr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmr`]
448module"]
449pub type FMR = crate::Reg<fmr::FMR_SPEC>;
450#[doc = "Flag Modification Register"]
451pub mod fmr;
452#[doc = "TBUF (rw) register accessor: Transmit Buffer\n\nYou can [`read`](crate::Reg::read) this register and get [`tbuf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tbuf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbuf`]
453module"]
454pub type TBUF = crate::Reg<tbuf::TBUF_SPEC>;
455#[doc = "Transmit Buffer"]
456pub mod tbuf;
457#[doc = "BYP (rw) register accessor: Bypass Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`byp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`byp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@byp`]
458module"]
459pub type BYP = crate::Reg<byp::BYP_SPEC>;
460#[doc = "Bypass Data Register"]
461pub mod byp;
462#[doc = "BYPCR (rw) register accessor: Bypass Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bypcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bypcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bypcr`]
463module"]
464pub type BYPCR = crate::Reg<bypcr::BYPCR_SPEC>;
465#[doc = "Bypass Control Register"]
466pub mod bypcr;
467#[doc = "TBCTR (rw) register accessor: Transmitter Buffer Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tbctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tbctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbctr`]
468module"]
469pub type TBCTR = crate::Reg<tbctr::TBCTR_SPEC>;
470#[doc = "Transmitter Buffer Control Register"]
471pub mod tbctr;
472#[doc = "RBCTR (rw) register accessor: Receiver Buffer Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rbctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rbctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbctr`]
473module"]
474pub type RBCTR = crate::Reg<rbctr::RBCTR_SPEC>;
475#[doc = "Receiver Buffer Control Register"]
476pub mod rbctr;
477#[doc = "TRBPTR (r) register accessor: Transmit/Receive Buffer Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trbptr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbptr`]
478module"]
479pub type TRBPTR = crate::Reg<trbptr::TRBPTR_SPEC>;
480#[doc = "Transmit/Receive Buffer Pointer Register"]
481pub mod trbptr;
482#[doc = "TRBSR (rw) register accessor: Transmit/Receive Buffer Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trbsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trbsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbsr`]
483module"]
484pub type TRBSR = crate::Reg<trbsr::TRBSR_SPEC>;
485#[doc = "Transmit/Receive Buffer Status Register"]
486pub mod trbsr;
487#[doc = "TRBSCR (w) register accessor: Transmit/Receive Buffer Status Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trbscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbscr`]
488module"]
489pub type TRBSCR = crate::Reg<trbscr::TRBSCR_SPEC>;
490#[doc = "Transmit/Receive Buffer Status Clear Register"]
491pub mod trbscr;
492#[doc = "OUTR (r) register accessor: Receiver Buffer Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`outr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n<div class=\"warning\">One or more dependent resources other than the current register are immediately affected by a read operation.</div>\n\nFor information about available fields see [`mod@outr`]
493module"]
494pub type OUTR = crate::Reg<outr::OUTR_SPEC>;
495#[doc = "Receiver Buffer Output Register"]
496pub mod outr;
497#[doc = "OUTDR (r) register accessor: Receiver Buffer Output Register L for Debugger\n\nYou can [`read`](crate::Reg::read) this register and get [`outdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outdr`]
498module"]
499pub type OUTDR = crate::Reg<outdr::OUTDR_SPEC>;
500#[doc = "Receiver Buffer Output Register L for Debugger"]
501pub mod outdr;
502#[doc = "IN (w) register accessor: Transmit FIFO Buffer\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`in_::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`]
503module"]
504pub type IN = crate::Reg<in_::IN_SPEC>;
505#[doc = "Transmit FIFO Buffer"]
506pub mod in_;