xmc4800/scu_reset/
prclr1.rs

1#[doc = "Register `PRCLR1` writer"]
2pub type W = crate::W<PRCLR1_SPEC>;
3#[doc = "CCU43 Reset Clear\n\nValue on reset: 0"]
4#[derive(Clone, Copy, Debug, PartialEq, Eq)]
5pub enum CCU43RS_A {
6    #[doc = "0: No effect"]
7    VALUE1 = 0,
8    #[doc = "1: De-assert reset"]
9    VALUE2 = 1,
10}
11impl From<CCU43RS_A> for bool {
12    #[inline(always)]
13    fn from(variant: CCU43RS_A) -> Self {
14        variant as u8 != 0
15    }
16}
17#[doc = "Field `CCU43RS` writer - CCU43 Reset Clear"]
18pub type CCU43RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU43RS_A>;
19impl<'a, REG> CCU43RS_W<'a, REG>
20where
21    REG: crate::Writable + crate::RegisterSpec,
22{
23    #[doc = "No effect"]
24    #[inline(always)]
25    pub fn value1(self) -> &'a mut crate::W<REG> {
26        self.variant(CCU43RS_A::VALUE1)
27    }
28    #[doc = "De-assert reset"]
29    #[inline(always)]
30    pub fn value2(self) -> &'a mut crate::W<REG> {
31        self.variant(CCU43RS_A::VALUE2)
32    }
33}
34#[doc = "LEDTS Reset Clear\n\nValue on reset: 0"]
35#[derive(Clone, Copy, Debug, PartialEq, Eq)]
36pub enum LEDTSCU0RS_A {
37    #[doc = "0: No effect"]
38    VALUE1 = 0,
39    #[doc = "1: De-assert reset"]
40    VALUE2 = 1,
41}
42impl From<LEDTSCU0RS_A> for bool {
43    #[inline(always)]
44    fn from(variant: LEDTSCU0RS_A) -> Self {
45        variant as u8 != 0
46    }
47}
48#[doc = "Field `LEDTSCU0RS` writer - LEDTS Reset Clear"]
49pub type LEDTSCU0RS_W<'a, REG> = crate::BitWriter<'a, REG, LEDTSCU0RS_A>;
50impl<'a, REG> LEDTSCU0RS_W<'a, REG>
51where
52    REG: crate::Writable + crate::RegisterSpec,
53{
54    #[doc = "No effect"]
55    #[inline(always)]
56    pub fn value1(self) -> &'a mut crate::W<REG> {
57        self.variant(LEDTSCU0RS_A::VALUE1)
58    }
59    #[doc = "De-assert reset"]
60    #[inline(always)]
61    pub fn value2(self) -> &'a mut crate::W<REG> {
62        self.variant(LEDTSCU0RS_A::VALUE2)
63    }
64}
65#[doc = "MultiCAN Reset Clear\n\nValue on reset: 0"]
66#[derive(Clone, Copy, Debug, PartialEq, Eq)]
67pub enum MCAN0RS_A {
68    #[doc = "0: No effect"]
69    VALUE1 = 0,
70    #[doc = "1: De-assert reset"]
71    VALUE2 = 1,
72}
73impl From<MCAN0RS_A> for bool {
74    #[inline(always)]
75    fn from(variant: MCAN0RS_A) -> Self {
76        variant as u8 != 0
77    }
78}
79#[doc = "Field `MCAN0RS` writer - MultiCAN Reset Clear"]
80pub type MCAN0RS_W<'a, REG> = crate::BitWriter<'a, REG, MCAN0RS_A>;
81impl<'a, REG> MCAN0RS_W<'a, REG>
82where
83    REG: crate::Writable + crate::RegisterSpec,
84{
85    #[doc = "No effect"]
86    #[inline(always)]
87    pub fn value1(self) -> &'a mut crate::W<REG> {
88        self.variant(MCAN0RS_A::VALUE1)
89    }
90    #[doc = "De-assert reset"]
91    #[inline(always)]
92    pub fn value2(self) -> &'a mut crate::W<REG> {
93        self.variant(MCAN0RS_A::VALUE2)
94    }
95}
96#[doc = "DAC Reset Clear\n\nValue on reset: 0"]
97#[derive(Clone, Copy, Debug, PartialEq, Eq)]
98pub enum DACRS_A {
99    #[doc = "0: No effect"]
100    VALUE1 = 0,
101    #[doc = "1: De-assert reset"]
102    VALUE2 = 1,
103}
104impl From<DACRS_A> for bool {
105    #[inline(always)]
106    fn from(variant: DACRS_A) -> Self {
107        variant as u8 != 0
108    }
109}
110#[doc = "Field `DACRS` writer - DAC Reset Clear"]
111pub type DACRS_W<'a, REG> = crate::BitWriter<'a, REG, DACRS_A>;
112impl<'a, REG> DACRS_W<'a, REG>
113where
114    REG: crate::Writable + crate::RegisterSpec,
115{
116    #[doc = "No effect"]
117    #[inline(always)]
118    pub fn value1(self) -> &'a mut crate::W<REG> {
119        self.variant(DACRS_A::VALUE1)
120    }
121    #[doc = "De-assert reset"]
122    #[inline(always)]
123    pub fn value2(self) -> &'a mut crate::W<REG> {
124        self.variant(DACRS_A::VALUE2)
125    }
126}
127#[doc = "MMC Interface Reset Clear\n\nValue on reset: 0"]
128#[derive(Clone, Copy, Debug, PartialEq, Eq)]
129pub enum MMCIRS_A {
130    #[doc = "0: No effect"]
131    VALUE1 = 0,
132    #[doc = "1: De-assert reset"]
133    VALUE2 = 1,
134}
135impl From<MMCIRS_A> for bool {
136    #[inline(always)]
137    fn from(variant: MMCIRS_A) -> Self {
138        variant as u8 != 0
139    }
140}
141#[doc = "Field `MMCIRS` writer - MMC Interface Reset Clear"]
142pub type MMCIRS_W<'a, REG> = crate::BitWriter<'a, REG, MMCIRS_A>;
143impl<'a, REG> MMCIRS_W<'a, REG>
144where
145    REG: crate::Writable + crate::RegisterSpec,
146{
147    #[doc = "No effect"]
148    #[inline(always)]
149    pub fn value1(self) -> &'a mut crate::W<REG> {
150        self.variant(MMCIRS_A::VALUE1)
151    }
152    #[doc = "De-assert reset"]
153    #[inline(always)]
154    pub fn value2(self) -> &'a mut crate::W<REG> {
155        self.variant(MMCIRS_A::VALUE2)
156    }
157}
158#[doc = "USIC1 Reset Clear\n\nValue on reset: 0"]
159#[derive(Clone, Copy, Debug, PartialEq, Eq)]
160pub enum USIC1RS_A {
161    #[doc = "0: No effect"]
162    VALUE1 = 0,
163    #[doc = "1: De-assert reset"]
164    VALUE2 = 1,
165}
166impl From<USIC1RS_A> for bool {
167    #[inline(always)]
168    fn from(variant: USIC1RS_A) -> Self {
169        variant as u8 != 0
170    }
171}
172#[doc = "Field `USIC1RS` writer - USIC1 Reset Clear"]
173pub type USIC1RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC1RS_A>;
174impl<'a, REG> USIC1RS_W<'a, REG>
175where
176    REG: crate::Writable + crate::RegisterSpec,
177{
178    #[doc = "No effect"]
179    #[inline(always)]
180    pub fn value1(self) -> &'a mut crate::W<REG> {
181        self.variant(USIC1RS_A::VALUE1)
182    }
183    #[doc = "De-assert reset"]
184    #[inline(always)]
185    pub fn value2(self) -> &'a mut crate::W<REG> {
186        self.variant(USIC1RS_A::VALUE2)
187    }
188}
189#[doc = "USIC2 Reset Clear\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum USIC2RS_A {
192    #[doc = "0: No effect"]
193    VALUE1 = 0,
194    #[doc = "1: De-assert reset"]
195    VALUE2 = 1,
196}
197impl From<USIC2RS_A> for bool {
198    #[inline(always)]
199    fn from(variant: USIC2RS_A) -> Self {
200        variant as u8 != 0
201    }
202}
203#[doc = "Field `USIC2RS` writer - USIC2 Reset Clear"]
204pub type USIC2RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC2RS_A>;
205impl<'a, REG> USIC2RS_W<'a, REG>
206where
207    REG: crate::Writable + crate::RegisterSpec,
208{
209    #[doc = "No effect"]
210    #[inline(always)]
211    pub fn value1(self) -> &'a mut crate::W<REG> {
212        self.variant(USIC2RS_A::VALUE1)
213    }
214    #[doc = "De-assert reset"]
215    #[inline(always)]
216    pub fn value2(self) -> &'a mut crate::W<REG> {
217        self.variant(USIC2RS_A::VALUE2)
218    }
219}
220#[doc = "PORTS Reset Clear\n\nValue on reset: 0"]
221#[derive(Clone, Copy, Debug, PartialEq, Eq)]
222pub enum PPORTSRS_A {
223    #[doc = "0: No effect"]
224    VALUE1 = 0,
225    #[doc = "1: De-assert reset"]
226    VALUE2 = 1,
227}
228impl From<PPORTSRS_A> for bool {
229    #[inline(always)]
230    fn from(variant: PPORTSRS_A) -> Self {
231        variant as u8 != 0
232    }
233}
234#[doc = "Field `PPORTSRS` writer - PORTS Reset Clear"]
235pub type PPORTSRS_W<'a, REG> = crate::BitWriter<'a, REG, PPORTSRS_A>;
236impl<'a, REG> PPORTSRS_W<'a, REG>
237where
238    REG: crate::Writable + crate::RegisterSpec,
239{
240    #[doc = "No effect"]
241    #[inline(always)]
242    pub fn value1(self) -> &'a mut crate::W<REG> {
243        self.variant(PPORTSRS_A::VALUE1)
244    }
245    #[doc = "De-assert reset"]
246    #[inline(always)]
247    pub fn value2(self) -> &'a mut crate::W<REG> {
248        self.variant(PPORTSRS_A::VALUE2)
249    }
250}
251impl W {
252    #[doc = "Bit 0 - CCU43 Reset Clear"]
253    #[inline(always)]
254    pub fn ccu43rs(&mut self) -> CCU43RS_W<PRCLR1_SPEC> {
255        CCU43RS_W::new(self, 0)
256    }
257    #[doc = "Bit 3 - LEDTS Reset Clear"]
258    #[inline(always)]
259    pub fn ledtscu0rs(&mut self) -> LEDTSCU0RS_W<PRCLR1_SPEC> {
260        LEDTSCU0RS_W::new(self, 3)
261    }
262    #[doc = "Bit 4 - MultiCAN Reset Clear"]
263    #[inline(always)]
264    pub fn mcan0rs(&mut self) -> MCAN0RS_W<PRCLR1_SPEC> {
265        MCAN0RS_W::new(self, 4)
266    }
267    #[doc = "Bit 5 - DAC Reset Clear"]
268    #[inline(always)]
269    pub fn dacrs(&mut self) -> DACRS_W<PRCLR1_SPEC> {
270        DACRS_W::new(self, 5)
271    }
272    #[doc = "Bit 6 - MMC Interface Reset Clear"]
273    #[inline(always)]
274    pub fn mmcirs(&mut self) -> MMCIRS_W<PRCLR1_SPEC> {
275        MMCIRS_W::new(self, 6)
276    }
277    #[doc = "Bit 7 - USIC1 Reset Clear"]
278    #[inline(always)]
279    pub fn usic1rs(&mut self) -> USIC1RS_W<PRCLR1_SPEC> {
280        USIC1RS_W::new(self, 7)
281    }
282    #[doc = "Bit 8 - USIC2 Reset Clear"]
283    #[inline(always)]
284    pub fn usic2rs(&mut self) -> USIC2RS_W<PRCLR1_SPEC> {
285        USIC2RS_W::new(self, 8)
286    }
287    #[doc = "Bit 9 - PORTS Reset Clear"]
288    #[inline(always)]
289    pub fn pportsrs(&mut self) -> PPORTSRS_W<PRCLR1_SPEC> {
290        PPORTSRS_W::new(self, 9)
291    }
292}
293#[doc = "RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
294pub struct PRCLR1_SPEC;
295impl crate::RegisterSpec for PRCLR1_SPEC {
296    type Ux = u32;
297}
298#[doc = "`write(|w| ..)` method takes [`prclr1::W`](W) writer structure"]
299impl crate::Writable for PRCLR1_SPEC {
300    type Safety = crate::Unsafe;
301    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
302    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
303}
304#[doc = "`reset()` method sets PRCLR1 to value 0"]
305impl crate::Resettable for PRCLR1_SPEC {
306    const RESET_VALUE: u32 = 0;
307}
xmc4800/scu_reset/prclr1.rs

xmc4800/scu_reset/
prclr1.rs
