Type Alias xmc4800::usic0_ch0::pcr_iicmode::MclkW

pub type MclkW<'a, REG> = BitWriter<'a, REG, Mclk>;

Field MCLK writer - Master Clock Enable

Aliased Type

struct MclkW<'a, REG> { /* private fields */ }

Implementations

impl<'a, REG> MclkW<'a, REG>

where REG: Writable + RegisterSpec,

pub fn value1(self) -> &'a mut W<REG>

The MCLK generation is disabled and MCLK is 0.

pub fn value2(self) -> &'a mut W<REG>

The MCLK generation is enabled.