Expand description
Mask for Raw IntTfr Status
Structs§
- Mask for Raw IntTfr Status
Enums§
- Mask bit for channel 0
- Mask bit for channel 1
- Mask bit for channel 2
- Mask bit for channel 3
- Write enable for mask bit of channel 0
- Write enable for mask bit of channel 1
- Write enable for mask bit of channel 2
- Write enable for mask bit of channel 3
Type Aliases§
- Field
CH0
reader - Mask bit for channel 0 - Field
CH0
writer - Mask bit for channel 0 - Field
CH1
reader - Mask bit for channel 1 - Field
CH1
writer - Mask bit for channel 1 - Field
CH2
reader - Mask bit for channel 2 - Field
CH2
writer - Mask bit for channel 2 - Field
CH3
reader - Mask bit for channel 3 - Field
CH3
writer - Mask bit for channel 3 - Register
MASKTFR
reader - Register
MASKTFR
writer - Field
WE_CH0
writer - Write enable for mask bit of channel 0 - Field
WE_CH1
writer - Write enable for mask bit of channel 1 - Field
WE_CH2
writer - Write enable for mask bit of channel 2 - Field
WE_CH3
writer - Write enable for mask bit of channel 3