Type Alias xmc4800::gpdma0_ch2::cfgh::FifoModeW

pub type FifoModeW<'a, REG> = BitWriter<'a, REG, FifoMode>;

Field FIFO_MODE writer - FIFO Mode Select

Aliased Type

struct FifoModeW<'a, REG> { /* private fields */ }

Implementations

impl<'a, REG> FifoModeW<'a, REG>

where REG: Writable + RegisterSpec,

pub fn value1(self) -> &'a mut W<REG>

Space/data available for single AHB transfer of the specified transfer width.

pub fn value2(self) -> &'a mut W<REG>

Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer.