Type Alias xmc4800::gpdma0::masksrctran::W

pub type W = W<MasksrctranSpec>;

Register MASKSRCTRAN writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn ch0(&mut self) -> Ch0W<'_, MasksrctranSpec>

Bit 0 - Mask bit for channel 0

pub fn ch1(&mut self) -> Ch1W<'_, MasksrctranSpec>

Bit 1 - Mask bit for channel 1

pub fn ch2(&mut self) -> Ch2W<'_, MasksrctranSpec>

Bit 2 - Mask bit for channel 2

pub fn ch3(&mut self) -> Ch3W<'_, MasksrctranSpec>

Bit 3 - Mask bit for channel 3

pub fn ch4(&mut self) -> Ch4W<'_, MasksrctranSpec>

Bit 4 - Mask bit for channel 4

pub fn ch5(&mut self) -> Ch5W<'_, MasksrctranSpec>

Bit 5 - Mask bit for channel 5

pub fn ch6(&mut self) -> Ch6W<'_, MasksrctranSpec>

Bit 6 - Mask bit for channel 6

pub fn ch7(&mut self) -> Ch7W<'_, MasksrctranSpec>

Bit 7 - Mask bit for channel 7

pub fn we_ch0(&mut self) -> WeCh0W<'_, MasksrctranSpec>

Bit 8 - Write enable for mask bit of channel 0

pub fn we_ch1(&mut self) -> WeCh1W<'_, MasksrctranSpec>

Bit 9 - Write enable for mask bit of channel 1

pub fn we_ch2(&mut self) -> WeCh2W<'_, MasksrctranSpec>

Bit 10 - Write enable for mask bit of channel 2

pub fn we_ch3(&mut self) -> WeCh3W<'_, MasksrctranSpec>

Bit 11 - Write enable for mask bit of channel 3

pub fn we_ch4(&mut self) -> WeCh4W<'_, MasksrctranSpec>

Bit 12 - Write enable for mask bit of channel 4

pub fn we_ch5(&mut self) -> WeCh5W<'_, MasksrctranSpec>

Bit 13 - Write enable for mask bit of channel 5

pub fn we_ch6(&mut self) -> WeCh6W<'_, MasksrctranSpec>

Bit 14 - Write enable for mask bit of channel 6

pub fn we_ch7(&mut self) -> WeCh7W<'_, MasksrctranSpec>

Bit 15 - Write enable for mask bit of channel 7