Type Alias xmc4800::ebu::busrcon2::W

pub type W = W<Busrcon2Spec>;

Register BUSRCON2 writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn fetblen(&mut self) -> FetblenW<'_, Busrcon2Spec>

Bits 0:2 - Burst Length for Synchronous Burst

pub fn fbbmsel(&mut self) -> FbbmselW<'_, Busrcon2Spec>

Bit 3 - Synchronous burst buffer mode select

pub fn bfsss(&mut self) -> BfsssW<'_, Busrcon2Spec>

Bit 4 - Read Single Stage Synchronization:

pub fn fdbken(&mut self) -> FdbkenW<'_, Busrcon2Spec>

Bit 5 - Burst FLASH Clock Feedback Enable

pub fn bfcmsel(&mut self) -> BfcmselW<'_, Busrcon2Spec>

Bit 6 - Burst Flash Clock Mode Select

pub fn naa(&mut self) -> NaaW<'_, Busrcon2Spec>

Bit 7 - Enable flash non-array access workaround

pub fn ecse(&mut self) -> EcseW<'_, Busrcon2Spec>

Bit 16 - Early Chip Select for Synchronous Burst

pub fn ebse(&mut self) -> EbseW<'_, Busrcon2Spec>

Bit 17 - Early Burst Signal Enable for Synchronous Burst

pub fn dba(&mut self) -> DbaW<'_, Busrcon2Spec>

Bit 18 - Disable Burst Address Wrapping

pub fn waitinv(&mut self) -> WaitinvW<'_, Busrcon2Spec>

Bit 19 - Reversed polarity at WAIT

pub fn bcgen(&mut self) -> BcgenW<'_, Busrcon2Spec>

Bits 20:21 - Byte Control Signal Control

pub fn portw(&mut self) -> PortwW<'_, Busrcon2Spec>

Bits 22:23 - Device Addressing Mode

pub fn wait(&mut self) -> WaitW<'_, Busrcon2Spec>

Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,

pub fn aap(&mut self) -> AapW<'_, Busrcon2Spec>

Bit 26 - Asynchronous Address phase:

pub fn agen(&mut self) -> AgenW<'_, Busrcon2Spec>

Bits 28:31 - Device Type for Region