Type Alias xmc4800::ebu::busrcon2::R

pub type R = R<Busrcon2Spec>;

Register BUSRCON2 reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn fetblen(&self) -> FetblenR

Bits 0:2 - Burst Length for Synchronous Burst

pub fn fbbmsel(&self) -> FbbmselR

Bit 3 - Synchronous burst buffer mode select

pub fn bfsss(&self) -> BfsssR

Bit 4 - Read Single Stage Synchronization:

pub fn fdbken(&self) -> FdbkenR

Bit 5 - Burst FLASH Clock Feedback Enable

pub fn bfcmsel(&self) -> BfcmselR

Bit 6 - Burst Flash Clock Mode Select

pub fn naa(&self) -> NaaR

Bit 7 - Enable flash non-array access workaround

pub fn ecse(&self) -> EcseR

Bit 16 - Early Chip Select for Synchronous Burst

pub fn ebse(&self) -> EbseR

Bit 17 - Early Burst Signal Enable for Synchronous Burst

pub fn dba(&self) -> DbaR

Bit 18 - Disable Burst Address Wrapping

pub fn waitinv(&self) -> WaitinvR

Bit 19 - Reversed polarity at WAIT

pub fn bcgen(&self) -> BcgenR

Bits 20:21 - Byte Control Signal Control

pub fn portw(&self) -> PortwR

Bits 22:23 - Device Addressing Mode

pub fn wait(&self) -> WaitR

Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,

pub fn aap(&self) -> AapR

Bit 26 - Asynchronous Address phase:

pub fn agen(&self) -> AgenR

Bits 28:31 - Device Type for Region