xmc4700/ebu/
sdrmod.rs

1#[doc = "Register `SDRMOD` reader"]
2pub type R = crate::R<SDRMOD_SPEC>;
3#[doc = "Register `SDRMOD` writer"]
4pub type W = crate::W<SDRMOD_SPEC>;
5#[doc = "Burst length\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum BURSTL_A {
9    #[doc = "0: 1 (default after reset)"]
10    VALUE1 = 0,
11    #[doc = "1: 2"]
12    VALUE2 = 1,
13    #[doc = "2: 4"]
14    VALUE3 = 2,
15    #[doc = "3: 8"]
16    VALUE4 = 3,
17    #[doc = "4: 16"]
18    VALUE5 = 4,
19}
20impl From<BURSTL_A> for u8 {
21    #[inline(always)]
22    fn from(variant: BURSTL_A) -> Self {
23        variant as _
24    }
25}
26impl crate::FieldSpec for BURSTL_A {
27    type Ux = u8;
28}
29impl crate::IsEnum for BURSTL_A {}
30#[doc = "Field `BURSTL` reader - Burst length"]
31pub type BURSTL_R = crate::FieldReader<BURSTL_A>;
32impl BURSTL_R {
33    #[doc = "Get enumerated values variant"]
34    #[inline(always)]
35    pub const fn variant(&self) -> Option<BURSTL_A> {
36        match self.bits {
37            0 => Some(BURSTL_A::VALUE1),
38            1 => Some(BURSTL_A::VALUE2),
39            2 => Some(BURSTL_A::VALUE3),
40            3 => Some(BURSTL_A::VALUE4),
41            4 => Some(BURSTL_A::VALUE5),
42            _ => None,
43        }
44    }
45    #[doc = "1 (default after reset)"]
46    #[inline(always)]
47    pub fn is_value1(&self) -> bool {
48        *self == BURSTL_A::VALUE1
49    }
50    #[doc = "2"]
51    #[inline(always)]
52    pub fn is_value2(&self) -> bool {
53        *self == BURSTL_A::VALUE2
54    }
55    #[doc = "4"]
56    #[inline(always)]
57    pub fn is_value3(&self) -> bool {
58        *self == BURSTL_A::VALUE3
59    }
60    #[doc = "8"]
61    #[inline(always)]
62    pub fn is_value4(&self) -> bool {
63        *self == BURSTL_A::VALUE4
64    }
65    #[doc = "16"]
66    #[inline(always)]
67    pub fn is_value5(&self) -> bool {
68        *self == BURSTL_A::VALUE5
69    }
70}
71#[doc = "Field `BURSTL` writer - Burst length"]
72pub type BURSTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, BURSTL_A>;
73impl<'a, REG> BURSTL_W<'a, REG>
74where
75    REG: crate::Writable + crate::RegisterSpec,
76    REG::Ux: From<u8>,
77{
78    #[doc = "1 (default after reset)"]
79    #[inline(always)]
80    pub fn value1(self) -> &'a mut crate::W<REG> {
81        self.variant(BURSTL_A::VALUE1)
82    }
83    #[doc = "2"]
84    #[inline(always)]
85    pub fn value2(self) -> &'a mut crate::W<REG> {
86        self.variant(BURSTL_A::VALUE2)
87    }
88    #[doc = "4"]
89    #[inline(always)]
90    pub fn value3(self) -> &'a mut crate::W<REG> {
91        self.variant(BURSTL_A::VALUE3)
92    }
93    #[doc = "8"]
94    #[inline(always)]
95    pub fn value4(self) -> &'a mut crate::W<REG> {
96        self.variant(BURSTL_A::VALUE4)
97    }
98    #[doc = "16"]
99    #[inline(always)]
100    pub fn value5(self) -> &'a mut crate::W<REG> {
101        self.variant(BURSTL_A::VALUE5)
102    }
103}
104#[doc = "Burst type\n\nValue on reset: 0"]
105#[derive(Clone, Copy, Debug, PartialEq, Eq)]
106pub enum BTYP_A {
107    #[doc = "0: Only this value should be written (default after reset)"]
108    VALUE1 = 0,
109}
110impl From<BTYP_A> for bool {
111    #[inline(always)]
112    fn from(variant: BTYP_A) -> Self {
113        variant as u8 != 0
114    }
115}
116#[doc = "Field `BTYP` reader - Burst type"]
117pub type BTYP_R = crate::BitReader<BTYP_A>;
118impl BTYP_R {
119    #[doc = "Get enumerated values variant"]
120    #[inline(always)]
121    pub const fn variant(&self) -> Option<BTYP_A> {
122        match self.bits {
123            false => Some(BTYP_A::VALUE1),
124            _ => None,
125        }
126    }
127    #[doc = "Only this value should be written (default after reset)"]
128    #[inline(always)]
129    pub fn is_value1(&self) -> bool {
130        *self == BTYP_A::VALUE1
131    }
132}
133#[doc = "Field `BTYP` writer - Burst type"]
134pub type BTYP_W<'a, REG> = crate::BitWriter<'a, REG, BTYP_A>;
135impl<'a, REG> BTYP_W<'a, REG>
136where
137    REG: crate::Writable + crate::RegisterSpec,
138{
139    #[doc = "Only this value should be written (default after reset)"]
140    #[inline(always)]
141    pub fn value1(self) -> &'a mut crate::W<REG> {
142        self.variant(BTYP_A::VALUE1)
143    }
144}
145#[doc = "CAS latency\n\nValue on reset: 2"]
146#[derive(Clone, Copy, Debug, PartialEq, Eq)]
147#[repr(u8)]
148pub enum CASLAT_A {
149    #[doc = "2: Two clocks (default after reset)"]
150    VALUE1 = 2,
151    #[doc = "3: Three clocks"]
152    VALUE2 = 3,
153}
154impl From<CASLAT_A> for u8 {
155    #[inline(always)]
156    fn from(variant: CASLAT_A) -> Self {
157        variant as _
158    }
159}
160impl crate::FieldSpec for CASLAT_A {
161    type Ux = u8;
162}
163impl crate::IsEnum for CASLAT_A {}
164#[doc = "Field `CASLAT` reader - CAS latency"]
165pub type CASLAT_R = crate::FieldReader<CASLAT_A>;
166impl CASLAT_R {
167    #[doc = "Get enumerated values variant"]
168    #[inline(always)]
169    pub const fn variant(&self) -> Option<CASLAT_A> {
170        match self.bits {
171            2 => Some(CASLAT_A::VALUE1),
172            3 => Some(CASLAT_A::VALUE2),
173            _ => None,
174        }
175    }
176    #[doc = "Two clocks (default after reset)"]
177    #[inline(always)]
178    pub fn is_value1(&self) -> bool {
179        *self == CASLAT_A::VALUE1
180    }
181    #[doc = "Three clocks"]
182    #[inline(always)]
183    pub fn is_value2(&self) -> bool {
184        *self == CASLAT_A::VALUE2
185    }
186}
187#[doc = "Field `CASLAT` writer - CAS latency"]
188pub type CASLAT_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CASLAT_A>;
189impl<'a, REG> CASLAT_W<'a, REG>
190where
191    REG: crate::Writable + crate::RegisterSpec,
192    REG::Ux: From<u8>,
193{
194    #[doc = "Two clocks (default after reset)"]
195    #[inline(always)]
196    pub fn value1(self) -> &'a mut crate::W<REG> {
197        self.variant(CASLAT_A::VALUE1)
198    }
199    #[doc = "Three clocks"]
200    #[inline(always)]
201    pub fn value2(self) -> &'a mut crate::W<REG> {
202        self.variant(CASLAT_A::VALUE2)
203    }
204}
205#[doc = "Operation Mode\n\nValue on reset: 0"]
206#[derive(Clone, Copy, Debug, PartialEq, Eq)]
207#[repr(u8)]
208pub enum OPMODE_A {
209    #[doc = "0: Only this value must be written (default after reset)"]
210    VALUE1 = 0,
211}
212impl From<OPMODE_A> for u8 {
213    #[inline(always)]
214    fn from(variant: OPMODE_A) -> Self {
215        variant as _
216    }
217}
218impl crate::FieldSpec for OPMODE_A {
219    type Ux = u8;
220}
221impl crate::IsEnum for OPMODE_A {}
222#[doc = "Field `OPMODE` reader - Operation Mode"]
223pub type OPMODE_R = crate::FieldReader<OPMODE_A>;
224impl OPMODE_R {
225    #[doc = "Get enumerated values variant"]
226    #[inline(always)]
227    pub const fn variant(&self) -> Option<OPMODE_A> {
228        match self.bits {
229            0 => Some(OPMODE_A::VALUE1),
230            _ => None,
231        }
232    }
233    #[doc = "Only this value must be written (default after reset)"]
234    #[inline(always)]
235    pub fn is_value1(&self) -> bool {
236        *self == OPMODE_A::VALUE1
237    }
238}
239#[doc = "Field `OPMODE` writer - Operation Mode"]
240pub type OPMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 7, OPMODE_A>;
241impl<'a, REG> OPMODE_W<'a, REG>
242where
243    REG: crate::Writable + crate::RegisterSpec,
244    REG::Ux: From<u8>,
245{
246    #[doc = "Only this value must be written (default after reset)"]
247    #[inline(always)]
248    pub fn value1(self) -> &'a mut crate::W<REG> {
249        self.variant(OPMODE_A::VALUE1)
250    }
251}
252#[doc = "Field `COLDSTART` writer - SDRAM coldstart"]
253pub type COLDSTART_W<'a, REG> = crate::BitWriter<'a, REG>;
254#[doc = "Field `XOPM` reader - Extended Operation Mode"]
255pub type XOPM_R = crate::FieldReader<u16>;
256#[doc = "Field `XOPM` writer - Extended Operation Mode"]
257pub type XOPM_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
258#[doc = "Field `XBA` reader - Extended Operation Bank Select"]
259pub type XBA_R = crate::FieldReader;
260#[doc = "Field `XBA` writer - Extended Operation Bank Select"]
261pub type XBA_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
262impl R {
263    #[doc = "Bits 0:2 - Burst length"]
264    #[inline(always)]
265    pub fn burstl(&self) -> BURSTL_R {
266        BURSTL_R::new((self.bits & 7) as u8)
267    }
268    #[doc = "Bit 3 - Burst type"]
269    #[inline(always)]
270    pub fn btyp(&self) -> BTYP_R {
271        BTYP_R::new(((self.bits >> 3) & 1) != 0)
272    }
273    #[doc = "Bits 4:6 - CAS latency"]
274    #[inline(always)]
275    pub fn caslat(&self) -> CASLAT_R {
276        CASLAT_R::new(((self.bits >> 4) & 7) as u8)
277    }
278    #[doc = "Bits 7:13 - Operation Mode"]
279    #[inline(always)]
280    pub fn opmode(&self) -> OPMODE_R {
281        OPMODE_R::new(((self.bits >> 7) & 0x7f) as u8)
282    }
283    #[doc = "Bits 16:27 - Extended Operation Mode"]
284    #[inline(always)]
285    pub fn xopm(&self) -> XOPM_R {
286        XOPM_R::new(((self.bits >> 16) & 0x0fff) as u16)
287    }
288    #[doc = "Bits 28:31 - Extended Operation Bank Select"]
289    #[inline(always)]
290    pub fn xba(&self) -> XBA_R {
291        XBA_R::new(((self.bits >> 28) & 0x0f) as u8)
292    }
293}
294impl W {
295    #[doc = "Bits 0:2 - Burst length"]
296    #[inline(always)]
297    pub fn burstl(&mut self) -> BURSTL_W<SDRMOD_SPEC> {
298        BURSTL_W::new(self, 0)
299    }
300    #[doc = "Bit 3 - Burst type"]
301    #[inline(always)]
302    pub fn btyp(&mut self) -> BTYP_W<SDRMOD_SPEC> {
303        BTYP_W::new(self, 3)
304    }
305    #[doc = "Bits 4:6 - CAS latency"]
306    #[inline(always)]
307    pub fn caslat(&mut self) -> CASLAT_W<SDRMOD_SPEC> {
308        CASLAT_W::new(self, 4)
309    }
310    #[doc = "Bits 7:13 - Operation Mode"]
311    #[inline(always)]
312    pub fn opmode(&mut self) -> OPMODE_W<SDRMOD_SPEC> {
313        OPMODE_W::new(self, 7)
314    }
315    #[doc = "Bit 15 - SDRAM coldstart"]
316    #[inline(always)]
317    pub fn coldstart(&mut self) -> COLDSTART_W<SDRMOD_SPEC> {
318        COLDSTART_W::new(self, 15)
319    }
320    #[doc = "Bits 16:27 - Extended Operation Mode"]
321    #[inline(always)]
322    pub fn xopm(&mut self) -> XOPM_W<SDRMOD_SPEC> {
323        XOPM_W::new(self, 16)
324    }
325    #[doc = "Bits 28:31 - Extended Operation Bank Select"]
326    #[inline(always)]
327    pub fn xba(&mut self) -> XBA_W<SDRMOD_SPEC> {
328        XBA_W::new(self, 28)
329    }
330}
331#[doc = "EBU SDRAM Mode Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sdrmod::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdrmod::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
332pub struct SDRMOD_SPEC;
333impl crate::RegisterSpec for SDRMOD_SPEC {
334    type Ux = u32;
335}
336#[doc = "`read()` method returns [`sdrmod::R`](R) reader structure"]
337impl crate::Readable for SDRMOD_SPEC {}
338#[doc = "`write(|w| ..)` method takes [`sdrmod::W`](W) writer structure"]
339impl crate::Writable for SDRMOD_SPEC {
340    type Safety = crate::Unsafe;
341    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
342    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
343}
344#[doc = "`reset()` method sets SDRMOD to value 0x20"]
345impl crate::Resettable for SDRMOD_SPEC {
346    const RESET_VALUE: u32 = 0x20;
347}
xmc4700/ebu/sdrmod.rs

xmc4700/ebu/
sdrmod.rs
