xmc4700/eth0/
debug.rs

1#[doc = "Register `DEBUG` reader"]
2pub type R = crate::R<DEBUG_SPEC>;
3#[doc = "Field `RPESTS` reader - MAC MII Receive Protocol Engine Status"]
4pub type RPESTS_R = crate::BitReader;
5#[doc = "Field `RFCFCSTS` reader - MAC Receive Frame Controller FIFO Status"]
6pub type RFCFCSTS_R = crate::FieldReader;
7#[doc = "Field `RWCSTS` reader - MTL Rx FIFO Write Controller Active Status"]
8pub type RWCSTS_R = crate::BitReader;
9#[doc = "Field `RRCSTS` reader - MTL Rx FIFO Read Controller State"]
10pub type RRCSTS_R = crate::FieldReader;
11#[doc = "Field `RXFSTS` reader - MTL Rx FIFO Fill-level Status"]
12pub type RXFSTS_R = crate::FieldReader;
13#[doc = "Field `TPESTS` reader - MAC MII Transmit Protocol Engine Status"]
14pub type TPESTS_R = crate::BitReader;
15#[doc = "Field `TFCSTS` reader - MAC Transmit Frame Controller Status"]
16pub type TFCSTS_R = crate::FieldReader;
17#[doc = "Field `TXPAUSED` reader - MAC transmitter in PAUSE"]
18pub type TXPAUSED_R = crate::BitReader;
19#[doc = "Field `TRCSTS` reader - MTL Tx FIFO Read Controller Status"]
20pub type TRCSTS_R = crate::FieldReader;
21#[doc = "Field `TWCSTS` reader - MTL Tx FIFO Write Controller Active Status"]
22pub type TWCSTS_R = crate::BitReader;
23#[doc = "Field `TXFSTS` reader - MTL Tx FIFO Not Empty Status"]
24pub type TXFSTS_R = crate::BitReader;
25#[doc = "Field `TXSTSFSTS` reader - MTL TxStatus FIFO Full Status"]
26pub type TXSTSFSTS_R = crate::BitReader;
27impl R {
28    #[doc = "Bit 0 - MAC MII Receive Protocol Engine Status"]
29    #[inline(always)]
30    pub fn rpests(&self) -> RPESTS_R {
31        RPESTS_R::new((self.bits & 1) != 0)
32    }
33    #[doc = "Bits 1:2 - MAC Receive Frame Controller FIFO Status"]
34    #[inline(always)]
35    pub fn rfcfcsts(&self) -> RFCFCSTS_R {
36        RFCFCSTS_R::new(((self.bits >> 1) & 3) as u8)
37    }
38    #[doc = "Bit 4 - MTL Rx FIFO Write Controller Active Status"]
39    #[inline(always)]
40    pub fn rwcsts(&self) -> RWCSTS_R {
41        RWCSTS_R::new(((self.bits >> 4) & 1) != 0)
42    }
43    #[doc = "Bits 5:6 - MTL Rx FIFO Read Controller State"]
44    #[inline(always)]
45    pub fn rrcsts(&self) -> RRCSTS_R {
46        RRCSTS_R::new(((self.bits >> 5) & 3) as u8)
47    }
48    #[doc = "Bits 8:9 - MTL Rx FIFO Fill-level Status"]
49    #[inline(always)]
50    pub fn rxfsts(&self) -> RXFSTS_R {
51        RXFSTS_R::new(((self.bits >> 8) & 3) as u8)
52    }
53    #[doc = "Bit 16 - MAC MII Transmit Protocol Engine Status"]
54    #[inline(always)]
55    pub fn tpests(&self) -> TPESTS_R {
56        TPESTS_R::new(((self.bits >> 16) & 1) != 0)
57    }
58    #[doc = "Bits 17:18 - MAC Transmit Frame Controller Status"]
59    #[inline(always)]
60    pub fn tfcsts(&self) -> TFCSTS_R {
61        TFCSTS_R::new(((self.bits >> 17) & 3) as u8)
62    }
63    #[doc = "Bit 19 - MAC transmitter in PAUSE"]
64    #[inline(always)]
65    pub fn txpaused(&self) -> TXPAUSED_R {
66        TXPAUSED_R::new(((self.bits >> 19) & 1) != 0)
67    }
68    #[doc = "Bits 20:21 - MTL Tx FIFO Read Controller Status"]
69    #[inline(always)]
70    pub fn trcsts(&self) -> TRCSTS_R {
71        TRCSTS_R::new(((self.bits >> 20) & 3) as u8)
72    }
73    #[doc = "Bit 22 - MTL Tx FIFO Write Controller Active Status"]
74    #[inline(always)]
75    pub fn twcsts(&self) -> TWCSTS_R {
76        TWCSTS_R::new(((self.bits >> 22) & 1) != 0)
77    }
78    #[doc = "Bit 24 - MTL Tx FIFO Not Empty Status"]
79    #[inline(always)]
80    pub fn txfsts(&self) -> TXFSTS_R {
81        TXFSTS_R::new(((self.bits >> 24) & 1) != 0)
82    }
83    #[doc = "Bit 25 - MTL TxStatus FIFO Full Status"]
84    #[inline(always)]
85    pub fn txstsfsts(&self) -> TXSTSFSTS_R {
86        TXSTSFSTS_R::new(((self.bits >> 25) & 1) != 0)
87    }
88}
89#[doc = "Debug Register\n\nYou can [`read`](crate::Reg::read) this register and get [`debug::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
90pub struct DEBUG_SPEC;
91impl crate::RegisterSpec for DEBUG_SPEC {
92    type Ux = u32;
93}
94#[doc = "`read()` method returns [`debug::R`](R) reader structure"]
95impl crate::Readable for DEBUG_SPEC {}
96#[doc = "`reset()` method sets DEBUG to value 0"]
97impl crate::Resettable for DEBUG_SPEC {
98    const RESET_VALUE: u32 = 0;
99}
xmc4700/eth0/debug.rs

xmc4700/eth0/
debug.rs
