xmc4700/ebu/
clc.rs

1#[doc = "Register `CLC` reader"]
2pub type R = crate::R<CLC_SPEC>;
3#[doc = "Register `CLC` writer"]
4pub type W = crate::W<CLC_SPEC>;
5#[doc = "EBU Disable Request Bit\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum DISR_A {
8    #[doc = "0: EBU disable is not requested"]
9    VALUE1 = 0,
10    #[doc = "1: EBU disable is requested"]
11    VALUE2 = 1,
12}
13impl From<DISR_A> for bool {
14    #[inline(always)]
15    fn from(variant: DISR_A) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `DISR` reader - EBU Disable Request Bit"]
20pub type DISR_R = crate::BitReader<DISR_A>;
21impl DISR_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> DISR_A {
25        match self.bits {
26            false => DISR_A::VALUE1,
27            true => DISR_A::VALUE2,
28        }
29    }
30    #[doc = "EBU disable is not requested"]
31    #[inline(always)]
32    pub fn is_value1(&self) -> bool {
33        *self == DISR_A::VALUE1
34    }
35    #[doc = "EBU disable is requested"]
36    #[inline(always)]
37    pub fn is_value2(&self) -> bool {
38        *self == DISR_A::VALUE2
39    }
40}
41#[doc = "Field `DISR` writer - EBU Disable Request Bit"]
42pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG, DISR_A>;
43impl<'a, REG> DISR_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "EBU disable is not requested"]
48    #[inline(always)]
49    pub fn value1(self) -> &'a mut crate::W<REG> {
50        self.variant(DISR_A::VALUE1)
51    }
52    #[doc = "EBU disable is requested"]
53    #[inline(always)]
54    pub fn value2(self) -> &'a mut crate::W<REG> {
55        self.variant(DISR_A::VALUE2)
56    }
57}
58#[doc = "EBU Disable Status Bit\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum DISS_A {
61    #[doc = "0: EBU is enabled (default after reset)"]
62    VALUE1 = 0,
63    #[doc = "1: EBU is disabled"]
64    VALUE2 = 1,
65}
66impl From<DISS_A> for bool {
67    #[inline(always)]
68    fn from(variant: DISS_A) -> Self {
69        variant as u8 != 0
70    }
71}
72#[doc = "Field `DISS` reader - EBU Disable Status Bit"]
73pub type DISS_R = crate::BitReader<DISS_A>;
74impl DISS_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> DISS_A {
78        match self.bits {
79            false => DISS_A::VALUE1,
80            true => DISS_A::VALUE2,
81        }
82    }
83    #[doc = "EBU is enabled (default after reset)"]
84    #[inline(always)]
85    pub fn is_value1(&self) -> bool {
86        *self == DISS_A::VALUE1
87    }
88    #[doc = "EBU is disabled"]
89    #[inline(always)]
90    pub fn is_value2(&self) -> bool {
91        *self == DISS_A::VALUE2
92    }
93}
94#[doc = "EBU Clocking Mode\n\nValue on reset: 1"]
95#[derive(Clone, Copy, Debug, PartialEq, Eq)]
96pub enum SYNC_A {
97    #[doc = "0: request EBU to run asynchronously to AHB bus clock and use separate clock source"]
98    VALUE1 = 0,
99    #[doc = "1: request EBU to run synchronously to ARM processor (default after reset)"]
100    VALUE2 = 1,
101}
102impl From<SYNC_A> for bool {
103    #[inline(always)]
104    fn from(variant: SYNC_A) -> Self {
105        variant as u8 != 0
106    }
107}
108#[doc = "Field `SYNC` reader - EBU Clocking Mode"]
109pub type SYNC_R = crate::BitReader<SYNC_A>;
110impl SYNC_R {
111    #[doc = "Get enumerated values variant"]
112    #[inline(always)]
113    pub const fn variant(&self) -> SYNC_A {
114        match self.bits {
115            false => SYNC_A::VALUE1,
116            true => SYNC_A::VALUE2,
117        }
118    }
119    #[doc = "request EBU to run asynchronously to AHB bus clock and use separate clock source"]
120    #[inline(always)]
121    pub fn is_value1(&self) -> bool {
122        *self == SYNC_A::VALUE1
123    }
124    #[doc = "request EBU to run synchronously to ARM processor (default after reset)"]
125    #[inline(always)]
126    pub fn is_value2(&self) -> bool {
127        *self == SYNC_A::VALUE2
128    }
129}
130#[doc = "Field `SYNC` writer - EBU Clocking Mode"]
131pub type SYNC_W<'a, REG> = crate::BitWriter<'a, REG, SYNC_A>;
132impl<'a, REG> SYNC_W<'a, REG>
133where
134    REG: crate::Writable + crate::RegisterSpec,
135{
136    #[doc = "request EBU to run asynchronously to AHB bus clock and use separate clock source"]
137    #[inline(always)]
138    pub fn value1(self) -> &'a mut crate::W<REG> {
139        self.variant(SYNC_A::VALUE1)
140    }
141    #[doc = "request EBU to run synchronously to ARM processor (default after reset)"]
142    #[inline(always)]
143    pub fn value2(self) -> &'a mut crate::W<REG> {
144        self.variant(SYNC_A::VALUE2)
145    }
146}
147#[doc = "DIV2 Clocking Mode\n\nValue on reset: 0"]
148#[derive(Clone, Copy, Debug, PartialEq, Eq)]
149pub enum DIV2_A {
150    #[doc = "0: standard clocking mode. clock input selected by SYNC bitfield (default after reset)."]
151    VALUE1 = 0,
152    #[doc = "1: request EBU to run off AHB bus clock divided by 2."]
153    VALUE2 = 1,
154}
155impl From<DIV2_A> for bool {
156    #[inline(always)]
157    fn from(variant: DIV2_A) -> Self {
158        variant as u8 != 0
159    }
160}
161#[doc = "Field `DIV2` reader - DIV2 Clocking Mode"]
162pub type DIV2_R = crate::BitReader<DIV2_A>;
163impl DIV2_R {
164    #[doc = "Get enumerated values variant"]
165    #[inline(always)]
166    pub const fn variant(&self) -> DIV2_A {
167        match self.bits {
168            false => DIV2_A::VALUE1,
169            true => DIV2_A::VALUE2,
170        }
171    }
172    #[doc = "standard clocking mode. clock input selected by SYNC bitfield (default after reset)."]
173    #[inline(always)]
174    pub fn is_value1(&self) -> bool {
175        *self == DIV2_A::VALUE1
176    }
177    #[doc = "request EBU to run off AHB bus clock divided by 2."]
178    #[inline(always)]
179    pub fn is_value2(&self) -> bool {
180        *self == DIV2_A::VALUE2
181    }
182}
183#[doc = "Field `DIV2` writer - DIV2 Clocking Mode"]
184pub type DIV2_W<'a, REG> = crate::BitWriter<'a, REG, DIV2_A>;
185impl<'a, REG> DIV2_W<'a, REG>
186where
187    REG: crate::Writable + crate::RegisterSpec,
188{
189    #[doc = "standard clocking mode. clock input selected by SYNC bitfield (default after reset)."]
190    #[inline(always)]
191    pub fn value1(self) -> &'a mut crate::W<REG> {
192        self.variant(DIV2_A::VALUE1)
193    }
194    #[doc = "request EBU to run off AHB bus clock divided by 2."]
195    #[inline(always)]
196    pub fn value2(self) -> &'a mut crate::W<REG> {
197        self.variant(DIV2_A::VALUE2)
198    }
199}
200#[doc = "EBU Clock Divide Ratio\n\nValue on reset: 0"]
201#[derive(Clone, Copy, Debug, PartialEq, Eq)]
202#[repr(u8)]
203pub enum EBUDIV_A {
204    #[doc = "0: request EBU to run off input clock (default after reset)"]
205    VALUE1 = 0,
206    #[doc = "1: request EBU to run off input clock divided by 2"]
207    VALUE2 = 1,
208    #[doc = "2: request EBU to run off input clock divided by 3"]
209    VALUE3 = 2,
210    #[doc = "3: request EBU to run off input clock divided by 4"]
211    VALUE4 = 3,
212}
213impl From<EBUDIV_A> for u8 {
214    #[inline(always)]
215    fn from(variant: EBUDIV_A) -> Self {
216        variant as _
217    }
218}
219impl crate::FieldSpec for EBUDIV_A {
220    type Ux = u8;
221}
222impl crate::IsEnum for EBUDIV_A {}
223#[doc = "Field `EBUDIV` reader - EBU Clock Divide Ratio"]
224pub type EBUDIV_R = crate::FieldReader<EBUDIV_A>;
225impl EBUDIV_R {
226    #[doc = "Get enumerated values variant"]
227    #[inline(always)]
228    pub const fn variant(&self) -> EBUDIV_A {
229        match self.bits {
230            0 => EBUDIV_A::VALUE1,
231            1 => EBUDIV_A::VALUE2,
232            2 => EBUDIV_A::VALUE3,
233            3 => EBUDIV_A::VALUE4,
234            _ => unreachable!(),
235        }
236    }
237    #[doc = "request EBU to run off input clock (default after reset)"]
238    #[inline(always)]
239    pub fn is_value1(&self) -> bool {
240        *self == EBUDIV_A::VALUE1
241    }
242    #[doc = "request EBU to run off input clock divided by 2"]
243    #[inline(always)]
244    pub fn is_value2(&self) -> bool {
245        *self == EBUDIV_A::VALUE2
246    }
247    #[doc = "request EBU to run off input clock divided by 3"]
248    #[inline(always)]
249    pub fn is_value3(&self) -> bool {
250        *self == EBUDIV_A::VALUE3
251    }
252    #[doc = "request EBU to run off input clock divided by 4"]
253    #[inline(always)]
254    pub fn is_value4(&self) -> bool {
255        *self == EBUDIV_A::VALUE4
256    }
257}
258#[doc = "Field `EBUDIV` writer - EBU Clock Divide Ratio"]
259pub type EBUDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EBUDIV_A, crate::Safe>;
260impl<'a, REG> EBUDIV_W<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263    REG::Ux: From<u8>,
264{
265    #[doc = "request EBU to run off input clock (default after reset)"]
266    #[inline(always)]
267    pub fn value1(self) -> &'a mut crate::W<REG> {
268        self.variant(EBUDIV_A::VALUE1)
269    }
270    #[doc = "request EBU to run off input clock divided by 2"]
271    #[inline(always)]
272    pub fn value2(self) -> &'a mut crate::W<REG> {
273        self.variant(EBUDIV_A::VALUE2)
274    }
275    #[doc = "request EBU to run off input clock divided by 3"]
276    #[inline(always)]
277    pub fn value3(self) -> &'a mut crate::W<REG> {
278        self.variant(EBUDIV_A::VALUE3)
279    }
280    #[doc = "request EBU to run off input clock divided by 4"]
281    #[inline(always)]
282    pub fn value4(self) -> &'a mut crate::W<REG> {
283        self.variant(EBUDIV_A::VALUE4)
284    }
285}
286#[doc = "EBU Clocking Mode Status\n\nValue on reset: 1"]
287#[derive(Clone, Copy, Debug, PartialEq, Eq)]
288pub enum SYNCACK_A {
289    #[doc = "0: the EBU is asynchronous to the AHB bus clock and is using a separate clock source"]
290    VALUE1 = 0,
291    #[doc = "1: EBU is synchronous to the AHB bus clock (default after reset)"]
292    VALUE2 = 1,
293}
294impl From<SYNCACK_A> for bool {
295    #[inline(always)]
296    fn from(variant: SYNCACK_A) -> Self {
297        variant as u8 != 0
298    }
299}
300#[doc = "Field `SYNCACK` reader - EBU Clocking Mode Status"]
301pub type SYNCACK_R = crate::BitReader<SYNCACK_A>;
302impl SYNCACK_R {
303    #[doc = "Get enumerated values variant"]
304    #[inline(always)]
305    pub const fn variant(&self) -> SYNCACK_A {
306        match self.bits {
307            false => SYNCACK_A::VALUE1,
308            true => SYNCACK_A::VALUE2,
309        }
310    }
311    #[doc = "the EBU is asynchronous to the AHB bus clock and is using a separate clock source"]
312    #[inline(always)]
313    pub fn is_value1(&self) -> bool {
314        *self == SYNCACK_A::VALUE1
315    }
316    #[doc = "EBU is synchronous to the AHB bus clock (default after reset)"]
317    #[inline(always)]
318    pub fn is_value2(&self) -> bool {
319        *self == SYNCACK_A::VALUE2
320    }
321}
322#[doc = "DIV2 Clocking Mode Status\n\nValue on reset: 0"]
323#[derive(Clone, Copy, Debug, PartialEq, Eq)]
324pub enum DIV2ACK_A {
325    #[doc = "0: EBU is using standard clocking mode. clock input selected by SYNC bitfield (default after reset)."]
326    VALUE1 = 0,
327    #[doc = "1: EBU is running off AHB bus clock divided by 2."]
328    VALUE2 = 1,
329}
330impl From<DIV2ACK_A> for bool {
331    #[inline(always)]
332    fn from(variant: DIV2ACK_A) -> Self {
333        variant as u8 != 0
334    }
335}
336#[doc = "Field `DIV2ACK` reader - DIV2 Clocking Mode Status"]
337pub type DIV2ACK_R = crate::BitReader<DIV2ACK_A>;
338impl DIV2ACK_R {
339    #[doc = "Get enumerated values variant"]
340    #[inline(always)]
341    pub const fn variant(&self) -> DIV2ACK_A {
342        match self.bits {
343            false => DIV2ACK_A::VALUE1,
344            true => DIV2ACK_A::VALUE2,
345        }
346    }
347    #[doc = "EBU is using standard clocking mode. clock input selected by SYNC bitfield (default after reset)."]
348    #[inline(always)]
349    pub fn is_value1(&self) -> bool {
350        *self == DIV2ACK_A::VALUE1
351    }
352    #[doc = "EBU is running off AHB bus clock divided by 2."]
353    #[inline(always)]
354    pub fn is_value2(&self) -> bool {
355        *self == DIV2ACK_A::VALUE2
356    }
357}
358#[doc = "EBU Clock Divide Ratio Status\n\nValue on reset: 0"]
359#[derive(Clone, Copy, Debug, PartialEq, Eq)]
360#[repr(u8)]
361pub enum EBUDIVACK_A {
362    #[doc = "0: EBU is running off input clock (default after reset)"]
363    VALUE1 = 0,
364    #[doc = "1: EBU is running off input clock divided by 2"]
365    VALUE2 = 1,
366    #[doc = "2: EBU is running off input clock divided by 3"]
367    VALUE3 = 2,
368    #[doc = "3: EBU is running off input clock divided by 4"]
369    VALUE4 = 3,
370}
371impl From<EBUDIVACK_A> for u8 {
372    #[inline(always)]
373    fn from(variant: EBUDIVACK_A) -> Self {
374        variant as _
375    }
376}
377impl crate::FieldSpec for EBUDIVACK_A {
378    type Ux = u8;
379}
380impl crate::IsEnum for EBUDIVACK_A {}
381#[doc = "Field `EBUDIVACK` reader - EBU Clock Divide Ratio Status"]
382pub type EBUDIVACK_R = crate::FieldReader<EBUDIVACK_A>;
383impl EBUDIVACK_R {
384    #[doc = "Get enumerated values variant"]
385    #[inline(always)]
386    pub const fn variant(&self) -> EBUDIVACK_A {
387        match self.bits {
388            0 => EBUDIVACK_A::VALUE1,
389            1 => EBUDIVACK_A::VALUE2,
390            2 => EBUDIVACK_A::VALUE3,
391            3 => EBUDIVACK_A::VALUE4,
392            _ => unreachable!(),
393        }
394    }
395    #[doc = "EBU is running off input clock (default after reset)"]
396    #[inline(always)]
397    pub fn is_value1(&self) -> bool {
398        *self == EBUDIVACK_A::VALUE1
399    }
400    #[doc = "EBU is running off input clock divided by 2"]
401    #[inline(always)]
402    pub fn is_value2(&self) -> bool {
403        *self == EBUDIVACK_A::VALUE2
404    }
405    #[doc = "EBU is running off input clock divided by 3"]
406    #[inline(always)]
407    pub fn is_value3(&self) -> bool {
408        *self == EBUDIVACK_A::VALUE3
409    }
410    #[doc = "EBU is running off input clock divided by 4"]
411    #[inline(always)]
412    pub fn is_value4(&self) -> bool {
413        *self == EBUDIVACK_A::VALUE4
414    }
415}
416impl R {
417    #[doc = "Bit 0 - EBU Disable Request Bit"]
418    #[inline(always)]
419    pub fn disr(&self) -> DISR_R {
420        DISR_R::new((self.bits & 1) != 0)
421    }
422    #[doc = "Bit 1 - EBU Disable Status Bit"]
423    #[inline(always)]
424    pub fn diss(&self) -> DISS_R {
425        DISS_R::new(((self.bits >> 1) & 1) != 0)
426    }
427    #[doc = "Bit 16 - EBU Clocking Mode"]
428    #[inline(always)]
429    pub fn sync(&self) -> SYNC_R {
430        SYNC_R::new(((self.bits >> 16) & 1) != 0)
431    }
432    #[doc = "Bit 17 - DIV2 Clocking Mode"]
433    #[inline(always)]
434    pub fn div2(&self) -> DIV2_R {
435        DIV2_R::new(((self.bits >> 17) & 1) != 0)
436    }
437    #[doc = "Bits 18:19 - EBU Clock Divide Ratio"]
438    #[inline(always)]
439    pub fn ebudiv(&self) -> EBUDIV_R {
440        EBUDIV_R::new(((self.bits >> 18) & 3) as u8)
441    }
442    #[doc = "Bit 20 - EBU Clocking Mode Status"]
443    #[inline(always)]
444    pub fn syncack(&self) -> SYNCACK_R {
445        SYNCACK_R::new(((self.bits >> 20) & 1) != 0)
446    }
447    #[doc = "Bit 21 - DIV2 Clocking Mode Status"]
448    #[inline(always)]
449    pub fn div2ack(&self) -> DIV2ACK_R {
450        DIV2ACK_R::new(((self.bits >> 21) & 1) != 0)
451    }
452    #[doc = "Bits 22:23 - EBU Clock Divide Ratio Status"]
453    #[inline(always)]
454    pub fn ebudivack(&self) -> EBUDIVACK_R {
455        EBUDIVACK_R::new(((self.bits >> 22) & 3) as u8)
456    }
457}
458impl W {
459    #[doc = "Bit 0 - EBU Disable Request Bit"]
460    #[inline(always)]
461    pub fn disr(&mut self) -> DISR_W<CLC_SPEC> {
462        DISR_W::new(self, 0)
463    }
464    #[doc = "Bit 16 - EBU Clocking Mode"]
465    #[inline(always)]
466    pub fn sync(&mut self) -> SYNC_W<CLC_SPEC> {
467        SYNC_W::new(self, 16)
468    }
469    #[doc = "Bit 17 - DIV2 Clocking Mode"]
470    #[inline(always)]
471    pub fn div2(&mut self) -> DIV2_W<CLC_SPEC> {
472        DIV2_W::new(self, 17)
473    }
474    #[doc = "Bits 18:19 - EBU Clock Divide Ratio"]
475    #[inline(always)]
476    pub fn ebudiv(&mut self) -> EBUDIV_W<CLC_SPEC> {
477        EBUDIV_W::new(self, 18)
478    }
479}
480#[doc = "EBU Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
481pub struct CLC_SPEC;
482impl crate::RegisterSpec for CLC_SPEC {
483    type Ux = u32;
484}
485#[doc = "`read()` method returns [`clc::R`](R) reader structure"]
486impl crate::Readable for CLC_SPEC {}
487#[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"]
488impl crate::Writable for CLC_SPEC {
489    type Safety = crate::Unsafe;
490    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
491    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
492}
493#[doc = "`reset()` method sets CLC to value 0x0011_0000"]
494impl crate::Resettable for CLC_SPEC {
495    const RESET_VALUE: u32 = 0x0011_0000;
496}
xmc4700/ebu/clc.rs

xmc4700/ebu/
clc.rs
