xmc4500/usic0_ch0/
inpr.rs

1#[doc = "Register `INPR` reader"]
2pub type R = crate::R<INPR_SPEC>;
3#[doc = "Register `INPR` writer"]
4pub type W = crate::W<INPR_SPEC>;
5#[doc = "Transmit Shift Interrupt Node Pointer\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum TSINP_A {
9    #[doc = "0: Output SR0 becomes activated."]
10    VALUE1 = 0,
11    #[doc = "1: Output SR1 becomes activated."]
12    VALUE2 = 1,
13    #[doc = "2: Output SR2 becomes activated."]
14    VALUE3 = 2,
15    #[doc = "3: Output SR3 becomes activated."]
16    VALUE4 = 3,
17    #[doc = "4: Output SR4 becomes activated."]
18    VALUE5 = 4,
19    #[doc = "5: Output SR5 becomes activated."]
20    VALUE6 = 5,
21}
22impl From<TSINP_A> for u8 {
23    #[inline(always)]
24    fn from(variant: TSINP_A) -> Self {
25        variant as _
26    }
27}
28impl crate::FieldSpec for TSINP_A {
29    type Ux = u8;
30}
31impl crate::IsEnum for TSINP_A {}
32#[doc = "Field `TSINP` reader - Transmit Shift Interrupt Node Pointer"]
33pub type TSINP_R = crate::FieldReader<TSINP_A>;
34impl TSINP_R {
35    #[doc = "Get enumerated values variant"]
36    #[inline(always)]
37    pub const fn variant(&self) -> Option<TSINP_A> {
38        match self.bits {
39            0 => Some(TSINP_A::VALUE1),
40            1 => Some(TSINP_A::VALUE2),
41            2 => Some(TSINP_A::VALUE3),
42            3 => Some(TSINP_A::VALUE4),
43            4 => Some(TSINP_A::VALUE5),
44            5 => Some(TSINP_A::VALUE6),
45            _ => None,
46        }
47    }
48    #[doc = "Output SR0 becomes activated."]
49    #[inline(always)]
50    pub fn is_value1(&self) -> bool {
51        *self == TSINP_A::VALUE1
52    }
53    #[doc = "Output SR1 becomes activated."]
54    #[inline(always)]
55    pub fn is_value2(&self) -> bool {
56        *self == TSINP_A::VALUE2
57    }
58    #[doc = "Output SR2 becomes activated."]
59    #[inline(always)]
60    pub fn is_value3(&self) -> bool {
61        *self == TSINP_A::VALUE3
62    }
63    #[doc = "Output SR3 becomes activated."]
64    #[inline(always)]
65    pub fn is_value4(&self) -> bool {
66        *self == TSINP_A::VALUE4
67    }
68    #[doc = "Output SR4 becomes activated."]
69    #[inline(always)]
70    pub fn is_value5(&self) -> bool {
71        *self == TSINP_A::VALUE5
72    }
73    #[doc = "Output SR5 becomes activated."]
74    #[inline(always)]
75    pub fn is_value6(&self) -> bool {
76        *self == TSINP_A::VALUE6
77    }
78}
79#[doc = "Field `TSINP` writer - Transmit Shift Interrupt Node Pointer"]
80pub type TSINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, TSINP_A>;
81impl<'a, REG> TSINP_W<'a, REG>
82where
83    REG: crate::Writable + crate::RegisterSpec,
84    REG::Ux: From<u8>,
85{
86    #[doc = "Output SR0 becomes activated."]
87    #[inline(always)]
88    pub fn value1(self) -> &'a mut crate::W<REG> {
89        self.variant(TSINP_A::VALUE1)
90    }
91    #[doc = "Output SR1 becomes activated."]
92    #[inline(always)]
93    pub fn value2(self) -> &'a mut crate::W<REG> {
94        self.variant(TSINP_A::VALUE2)
95    }
96    #[doc = "Output SR2 becomes activated."]
97    #[inline(always)]
98    pub fn value3(self) -> &'a mut crate::W<REG> {
99        self.variant(TSINP_A::VALUE3)
100    }
101    #[doc = "Output SR3 becomes activated."]
102    #[inline(always)]
103    pub fn value4(self) -> &'a mut crate::W<REG> {
104        self.variant(TSINP_A::VALUE4)
105    }
106    #[doc = "Output SR4 becomes activated."]
107    #[inline(always)]
108    pub fn value5(self) -> &'a mut crate::W<REG> {
109        self.variant(TSINP_A::VALUE5)
110    }
111    #[doc = "Output SR5 becomes activated."]
112    #[inline(always)]
113    pub fn value6(self) -> &'a mut crate::W<REG> {
114        self.variant(TSINP_A::VALUE6)
115    }
116}
117#[doc = "Field `TBINP` reader - Transmit Buffer Interrupt Node Pointer"]
118pub type TBINP_R = crate::FieldReader;
119#[doc = "Field `TBINP` writer - Transmit Buffer Interrupt Node Pointer"]
120pub type TBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
121#[doc = "Field `RINP` reader - Receive Interrupt Node Pointer"]
122pub type RINP_R = crate::FieldReader;
123#[doc = "Field `RINP` writer - Receive Interrupt Node Pointer"]
124pub type RINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
125#[doc = "Field `AINP` reader - Alternative Receive Interrupt Node Pointer"]
126pub type AINP_R = crate::FieldReader;
127#[doc = "Field `AINP` writer - Alternative Receive Interrupt Node Pointer"]
128pub type AINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
129#[doc = "Field `PINP` reader - Protocol Interrupt Node Pointer"]
130pub type PINP_R = crate::FieldReader;
131#[doc = "Field `PINP` writer - Protocol Interrupt Node Pointer"]
132pub type PINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
133impl R {
134    #[doc = "Bits 0:2 - Transmit Shift Interrupt Node Pointer"]
135    #[inline(always)]
136    pub fn tsinp(&self) -> TSINP_R {
137        TSINP_R::new((self.bits & 7) as u8)
138    }
139    #[doc = "Bits 4:6 - Transmit Buffer Interrupt Node Pointer"]
140    #[inline(always)]
141    pub fn tbinp(&self) -> TBINP_R {
142        TBINP_R::new(((self.bits >> 4) & 7) as u8)
143    }
144    #[doc = "Bits 8:10 - Receive Interrupt Node Pointer"]
145    #[inline(always)]
146    pub fn rinp(&self) -> RINP_R {
147        RINP_R::new(((self.bits >> 8) & 7) as u8)
148    }
149    #[doc = "Bits 12:14 - Alternative Receive Interrupt Node Pointer"]
150    #[inline(always)]
151    pub fn ainp(&self) -> AINP_R {
152        AINP_R::new(((self.bits >> 12) & 7) as u8)
153    }
154    #[doc = "Bits 16:18 - Protocol Interrupt Node Pointer"]
155    #[inline(always)]
156    pub fn pinp(&self) -> PINP_R {
157        PINP_R::new(((self.bits >> 16) & 7) as u8)
158    }
159}
160impl W {
161    #[doc = "Bits 0:2 - Transmit Shift Interrupt Node Pointer"]
162    #[inline(always)]
163    pub fn tsinp(&mut self) -> TSINP_W<INPR_SPEC> {
164        TSINP_W::new(self, 0)
165    }
166    #[doc = "Bits 4:6 - Transmit Buffer Interrupt Node Pointer"]
167    #[inline(always)]
168    pub fn tbinp(&mut self) -> TBINP_W<INPR_SPEC> {
169        TBINP_W::new(self, 4)
170    }
171    #[doc = "Bits 8:10 - Receive Interrupt Node Pointer"]
172    #[inline(always)]
173    pub fn rinp(&mut self) -> RINP_W<INPR_SPEC> {
174        RINP_W::new(self, 8)
175    }
176    #[doc = "Bits 12:14 - Alternative Receive Interrupt Node Pointer"]
177    #[inline(always)]
178    pub fn ainp(&mut self) -> AINP_W<INPR_SPEC> {
179        AINP_W::new(self, 12)
180    }
181    #[doc = "Bits 16:18 - Protocol Interrupt Node Pointer"]
182    #[inline(always)]
183    pub fn pinp(&mut self) -> PINP_W<INPR_SPEC> {
184        PINP_W::new(self, 16)
185    }
186}
187#[doc = "Interrupt Node Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`inpr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inpr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
188pub struct INPR_SPEC;
189impl crate::RegisterSpec for INPR_SPEC {
190    type Ux = u32;
191}
192#[doc = "`read()` method returns [`inpr::R`](R) reader structure"]
193impl crate::Readable for INPR_SPEC {}
194#[doc = "`write(|w| ..)` method takes [`inpr::W`](W) writer structure"]
195impl crate::Writable for INPR_SPEC {
196    type Safety = crate::Unsafe;
197    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
198    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
199}
200#[doc = "`reset()` method sets INPR to value 0"]
201impl crate::Resettable for INPR_SPEC {
202    const RESET_VALUE: u32 = 0;
203}
xmc4500/usic0_ch0/inpr.rs

xmc4500/usic0_ch0/
inpr.rs
