[][src]Enum xmc4400::usic0_ch0::dx1cr::DCEN_A

pub enum DCEN_A {
    VALUE1,
    VALUE2,
}

Delay Compensation Enable

Value on reset: 0

Variants

VALUE1

0: The receive shift clock is dependent on INSW selection.

VALUE2

1: The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0.

Trait Implementations

impl Clone for DCEN_A[src]

impl Copy for DCEN_A[src]

impl Debug for DCEN_A[src]

impl From<DCEN_A> for bool[src]

impl PartialEq<DCEN_A> for DCEN_A[src]

impl StructuralPartialEq for DCEN_A[src]

Auto Trait Implementations

impl Send for DCEN_A

impl Sync for DCEN_A

impl Unpin for DCEN_A

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.