[−][src]Type Definition xmc4400::scu_interrupt::srset::W
type W = W<u32, SRSET>;
Writer for register SRSET
Implementations
impl W
[src]
pub fn prwarn(&mut self) -> PRWARN_W<'_>
[src]
Bit 0 - WDT pre-warning Interrupt Set
pub fn pi(&mut self) -> PI_W<'_>
[src]
Bit 1 - RTC Periodic Interrupt Set
pub fn ai(&mut self) -> AI_W<'_>
[src]
Bit 2 - RTC Alarm Interrupt Set
pub fn dlrovr(&mut self) -> DLROVR_W<'_>
[src]
Bit 3 - DLR Request Overrun Interrupt Set
pub fn lpaccr(&mut self) -> LPACCR_W<'_>
[src]
Bit 6 - LPACLR Mirror Register Update Interrupt Set
pub fn lpacth0(&mut self) -> LPACTH0_W<'_>
[src]
Bit 7 - LPACTH0 Mirror Register Update Interrupt Set
pub fn lpacth1(&mut self) -> LPACTH1_W<'_>
[src]
Bit 8 - LPACTH1 Mirror Register Update Interrupt Set
pub fn lpacst(&mut self) -> LPACST_W<'_>
[src]
Bit 9 - LPACST Mirror Register Update Interrupt Set
pub fn lpacclr(&mut self) -> LPACCLR_W<'_>
[src]
Bit 10 - LPACCLR Mirror Register Update Interrupt Set
pub fn lpacset(&mut self) -> LPACSET_W<'_>
[src]
Bit 11 - LPACSET Mirror Register Update Interrupt Set
pub fn hintst(&mut self) -> HINTST_W<'_>
[src]
Bit 12 - HINTST Mirror Register Update Interrupt Set
pub fn hintclr(&mut self) -> HINTCLR_W<'_>
[src]
Bit 13 - HINTCLR Mirror Register Update Interrupt Set
pub fn hintset(&mut self) -> HINTSET_W<'_>
[src]
Bit 14 - HINTSET Mirror Register Update Interrupt Set
pub fn hdcrclr(&mut self) -> HDCRCLR_W<'_>
[src]
Bit 17 - HDCRCLR Mirror Register Update Set
pub fn hdcrset(&mut self) -> HDCRSET_W<'_>
[src]
Bit 18 - HDCRSET Mirror Register Update Set
pub fn hdcr(&mut self) -> HDCR_W<'_>
[src]
Bit 19 - HDCR Mirror Register Update Set
pub fn oscsictrl(&mut self) -> OSCSICTRL_W<'_>
[src]
Bit 21 - OSCSICTRL Mirror Register Update Set
pub fn osculctrl(&mut self) -> OSCULCTRL_W<'_>
[src]
Bit 23 - OSCULCTRL Mirror Register Update Set
pub fn rtc_ctr(&mut self) -> RTC_CTR_W<'_>
[src]
Bit 24 - RTC CTR Mirror Register Update Set
pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W<'_>
[src]
Bit 25 - RTC ATIM0 Mirror Register Update Set
pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W<'_>
[src]
Bit 26 - RTC ATIM1 Mirror Register Update Set
pub fn rtc_tim0(&mut self) -> RTC_TIM0_W<'_>
[src]
Bit 27 - RTC TIM0 Mirror Register Update Set
pub fn rtc_tim1(&mut self) -> RTC_TIM1_W<'_>
[src]
Bit 28 - RTC TIM1 Mirror Register Update Set
pub fn rmx(&mut self) -> RMX_W<'_>
[src]
Bit 29 - Retention Memory Mirror Register Update Set