Struct xmc4400::ppb::RegisterBlock

source ·

#[repr(C)]
pub struct RegisterBlock {Show 84 fields
    pub actlr: ACTLR,
    pub syst_csr: SYST_CSR,
    pub syst_rvr: SYST_RVR,
    pub syst_cvr: SYST_CVR,
    pub syst_calib: SYST_CALIB,
    pub nvic_iser0: NVIC_ISER0,
    pub nvic_iser1: NVIC_ISER1,
    pub nvic_iser2: NVIC_ISER2,
    pub nvic_iser3: NVIC_ISER3,
    pub nvic_icer0: NVIC_ICER0,
    pub nvic_icer1: NVIC_ICER1,
    pub nvic_icer2: NVIC_ICER2,
    pub nvic_icer3: NVIC_ICER3,
    pub nvic_ispr0: NVIC_ISPR0,
    pub nvic_ispr1: NVIC_ISPR1,
    pub nvic_ispr2: NVIC_ISPR2,
    pub nvic_ispr3: NVIC_ISPR3,
    pub nvic_icpr0: NVIC_ICPR0,
    pub nvic_icpr1: NVIC_ICPR1,
    pub nvic_icpr2: NVIC_ICPR2,
    pub nvic_icpr3: NVIC_ICPR3,
    pub nvic_iabr0: NVIC_IABR0,
    pub nvic_iabr1: NVIC_IABR1,
    pub nvic_iabr2: NVIC_IABR2,
    pub nvic_iabr3: NVIC_IABR3,
    pub nvic_ipr0: NVIC_IPR0,
    pub nvic_ipr1: NVIC_IPR1,
    pub nvic_ipr2: NVIC_IPR2,
    pub nvic_ipr3: NVIC_IPR3,
    pub nvic_ipr4: NVIC_IPR4,
    pub nvic_ipr5: NVIC_IPR5,
    pub nvic_ipr6: NVIC_IPR6,
    pub nvic_ipr7: NVIC_IPR7,
    pub nvic_ipr8: NVIC_IPR8,
    pub nvic_ipr9: NVIC_IPR9,
    pub nvic_ipr10: NVIC_IPR10,
    pub nvic_ipr11: NVIC_IPR11,
    pub nvic_ipr12: NVIC_IPR12,
    pub nvic_ipr13: NVIC_IPR13,
    pub nvic_ipr14: NVIC_IPR14,
    pub nvic_ipr15: NVIC_IPR15,
    pub nvic_ipr16: NVIC_IPR16,
    pub nvic_ipr17: NVIC_IPR17,
    pub nvic_ipr18: NVIC_IPR18,
    pub nvic_ipr19: NVIC_IPR19,
    pub nvic_ipr20: NVIC_IPR20,
    pub nvic_ipr21: NVIC_IPR21,
    pub nvic_ipr22: NVIC_IPR22,
    pub nvic_ipr23: NVIC_IPR23,
    pub nvic_ipr24: NVIC_IPR24,
    pub nvic_ipr25: NVIC_IPR25,
    pub nvic_ipr26: NVIC_IPR26,
    pub nvic_ipr27: NVIC_IPR27,
    pub cpuid: CPUID,
    pub icsr: ICSR,
    pub vtor: VTOR,
    pub aircr: AIRCR,
    pub scr: SCR,
    pub ccr: CCR,
    pub shpr1: SHPR1,
    pub shpr2: SHPR2,
    pub shpr3: SHPR3,
    pub shcsr: SHCSR,
    pub cfsr: CFSR,
    pub hfsr: HFSR,
    pub mmfar: MMFAR,
    pub bfar: BFAR,
    pub afsr: AFSR,
    pub cpacr: CPACR,
    pub mpu_type: MPU_TYPE,
    pub mpu_ctrl: MPU_CTRL,
    pub mpu_rnr: MPU_RNR,
    pub mpu_rbar: MPU_RBAR,
    pub mpu_rasr: MPU_RASR,
    pub mpu_rbar_a1: MPU_RBAR_A1,
    pub mpu_rasr_a1: MPU_RASR_A1,
    pub mpu_rbar_a2: MPU_RBAR_A2,
    pub mpu_rasr_a2: MPU_RASR_A2,
    pub mpu_rbar_a3: MPU_RBAR_A3,
    pub mpu_rasr_a3: MPU_RASR_A3,
    pub stir: STIR,
    pub fpccr: FPCCR,
    pub fpcar: FPCAR,
    pub fpdscr: FPDSCR,
    /* private fields */
}

Expand description

Register block

Fields§

§actlr: ACTLR

0x08 - Auxiliary Control Register

§syst_csr: SYST_CSR

0x10 - SysTick Control and Status Register

§syst_rvr: SYST_RVR

0x14 - SysTick Reload Value Register

§syst_cvr: SYST_CVR

0x18 - SysTick Current Value Register

§syst_calib: SYST_CALIB

0x1c - SysTick Calibration Value Register r

§nvic_iser0: NVIC_ISER0

0x100 - Interrupt Set-enable Register 0

§nvic_iser1: NVIC_ISER1

0x104 - Interrupt Set-enable Register 1

§nvic_iser2: NVIC_ISER2

0x108 - Interrupt Set-enable Register 2

§nvic_iser3: NVIC_ISER3

0x10c - Interrupt Set-enable Register 3

§nvic_icer0: NVIC_ICER0

0x180 - Interrupt Clear-enable Register 0

§nvic_icer1: NVIC_ICER1

0x184 - Interrupt Clear-enable Register 1

§nvic_icer2: NVIC_ICER2

0x188 - Interrupt Clear-enable Register 2

§nvic_icer3: NVIC_ICER3

0x18c - Interrupt Clear-enable Register 3

§nvic_ispr0: NVIC_ISPR0

0x200 - Interrupt Set-pending Register 0

§nvic_ispr1: NVIC_ISPR1

0x204 - Interrupt Set-pending Register 1

§nvic_ispr2: NVIC_ISPR2

0x208 - Interrupt Set-pending Register 2

§nvic_ispr3: NVIC_ISPR3

0x20c - Interrupt Set-pending Register 3

§nvic_icpr0: NVIC_ICPR0

0x280 - Interrupt Clear-pending Register 0

§nvic_icpr1: NVIC_ICPR1

0x284 - Interrupt Clear-pending Register 1

§nvic_icpr2: NVIC_ICPR2

0x288 - Interrupt Clear-pending Register 2

§nvic_icpr3: NVIC_ICPR3

0x28c - Interrupt Clear-pending Register 3

§nvic_iabr0: NVIC_IABR0

0x300 - Interrupt Active Bit Register 0

§nvic_iabr1: NVIC_IABR1

0x304 - Interrupt Active Bit Register 1

§nvic_iabr2: NVIC_IABR2

0x308 - Interrupt Active Bit Register 2

§nvic_iabr3: NVIC_IABR3

0x30c - Interrupt Active Bit Register 3

§nvic_ipr0: NVIC_IPR0

0x400 - Interrupt Priority Register 0

§nvic_ipr1: NVIC_IPR1

0x404 - Interrupt Priority Register 1

§nvic_ipr2: NVIC_IPR2

0x408 - Interrupt Priority Register 2

§nvic_ipr3: NVIC_IPR3

0x40c - Interrupt Priority Register 3

§nvic_ipr4: NVIC_IPR4

0x410 - Interrupt Priority Register 4

§nvic_ipr5: NVIC_IPR5

0x414 - Interrupt Priority Register 5

§nvic_ipr6: NVIC_IPR6

0x418 - Interrupt Priority Register 6

§nvic_ipr7: NVIC_IPR7

0x41c - Interrupt Priority Register 7

§nvic_ipr8: NVIC_IPR8

0x420 - Interrupt Priority Register 8

§nvic_ipr9: NVIC_IPR9

0x424 - Interrupt Priority Register 9

§nvic_ipr10: NVIC_IPR10

0x428 - Interrupt Priority Register 10

§nvic_ipr11: NVIC_IPR11

0x42c - Interrupt Priority Register 11

§nvic_ipr12: NVIC_IPR12

0x430 - Interrupt Priority Register 12

§nvic_ipr13: NVIC_IPR13

0x434 - Interrupt Priority Register 13

§nvic_ipr14: NVIC_IPR14

0x438 - Interrupt Priority Register 14

§nvic_ipr15: NVIC_IPR15

0x43c - Interrupt Priority Register 15

§nvic_ipr16: NVIC_IPR16

0x440 - Interrupt Priority Register 16

§nvic_ipr17: NVIC_IPR17

0x444 - Interrupt Priority Register 17

§nvic_ipr18: NVIC_IPR18

0x448 - Interrupt Priority Register 18

§nvic_ipr19: NVIC_IPR19

0x44c - Interrupt Priority Register 19

§nvic_ipr20: NVIC_IPR20

0x450 - Interrupt Priority Register 20

§nvic_ipr21: NVIC_IPR21

0x454 - Interrupt Priority Register 21

§nvic_ipr22: NVIC_IPR22

0x458 - Interrupt Priority Register 22

§nvic_ipr23: NVIC_IPR23

0x45c - Interrupt Priority Register 23

§nvic_ipr24: NVIC_IPR24

0x460 - Interrupt Priority Register 24

§nvic_ipr25: NVIC_IPR25

0x464 - Interrupt Priority Register 25

§nvic_ipr26: NVIC_IPR26

0x468 - Interrupt Priority Register 26

§nvic_ipr27: NVIC_IPR27

0x46c - Interrupt Priority Register 27

§cpuid: CPUID

0xd00 - CPUID Base Register

§icsr: ICSR

0xd04 - Interrupt Control and State Register

§vtor: VTOR

0xd08 - Vector Table Offset Register

§aircr: AIRCR

0xd0c - Application Interrupt and Reset Control Register

§scr: SCR

0xd10 - System Control Register

§ccr: CCR

0xd14 - Configuration and Control Register

§shpr1: SHPR1

0xd18 - System Handler Priority Register 1

§shpr2: SHPR2

0xd1c - System Handler Priority Register 2

§shpr3: SHPR3

0xd20 - System Handler Priority Register 3

§shcsr: SHCSR

0xd24 - System Handler Control and State Register

§cfsr: CFSR

0xd28 - Configurable Fault Status Register

§hfsr: HFSR

0xd2c - HardFault Status Register

§mmfar: MMFAR

0xd34 - MemManage Fault Address Register

§bfar: BFAR

0xd38 - BusFault Address Register

§afsr: AFSR

0xd3c - Auxiliary Fault Status Register

§cpacr: CPACR

0xd88 - Coprocessor Access Control Register

§mpu_type: MPU_TYPE

0xd90 - MPU Type Register

§mpu_ctrl: MPU_CTRL

0xd94 - MPU Control Register

§mpu_rnr: MPU_RNR

0xd98 - MPU Region Number Register

§mpu_rbar: MPU_RBAR

0xd9c - MPU Region Base Address Register

§mpu_rasr: MPU_RASR

0xda0 - MPU Region Attribute and Size Register

§mpu_rbar_a1: MPU_RBAR_A1

0xda4 - MPU Region Base Address Register A1

§mpu_rasr_a1: MPU_RASR_A1

0xda8 - MPU Region Attribute and Size Register A1

§mpu_rbar_a2: MPU_RBAR_A2

0xdac - MPU Region Base Address Register A2

§mpu_rasr_a2: MPU_RASR_A2

0xdb0 - MPU Region Attribute and Size Register A2

§mpu_rbar_a3: MPU_RBAR_A3

0xdb4 - MPU Region Base Address Register A3

§mpu_rasr_a3: MPU_RASR_A3

0xdb8 - MPU Region Attribute and Size Register A3

§stir: STIR

0xf00 - Software Trigger Interrupt Register

§fpccr: FPCCR

0xf34 - Floating-point Context Control Register

§fpcar: FPCAR

0xf38 - Floating-point Context Address Register

§fpdscr: FPDSCR

0xf3c - Floating-point Default Status Control Register

Auto Trait Implementations§

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impl UnwindSafe for RegisterBlock

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fn into(self) -> U

Calls U::from(self).

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type Output = T

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type Error = Infallible

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Performs the conversion.

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Performs the conversion.

Struct xmc4400::ppb::RegisterBlock

Fields§

Auto Trait Implementations§

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations§

impl<T> Any for Twhere
T: 'static + ?Sized,

fn type_id(&self) -> TypeId

impl<T> Borrow<T> for Twhere
T: ?Sized,

fn borrow(&self) -> &T

impl<T> BorrowMut<T> for Twhere
T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

fn from(t: T) -> T

impl<T, U> Into<U> for Twhere
U: From<T>,

fn into(self) -> U

impl<T> Same<T> for T

type Output = T

impl<T, U> TryFrom<U> for Twhere
U: Into<T>,

type Error = Infallible

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for Twhere
U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Struct xmc4400::ppb::RegisterBlock

Fields§

Auto Trait Implementations§

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations§

impl<T> Any for Twhere T: 'static + ?Sized,

fn type_id(&self) -> TypeId

impl<T> Borrow<T> for Twhere T: ?Sized,

fn borrow(&self) -> &T

impl<T> BorrowMut<T> for Twhere T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

fn from(t: T) -> T

impl<T, U> Into<U> for Twhere U: From<T>,

fn into(self) -> U

impl<T> Same<T> for T

type Output = T

impl<T, U> TryFrom<U> for Twhere U: Into<T>,

type Error = Infallible

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for Twhere U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

impl<T> Any for Twhere
T: 'static + ?Sized,

impl<T> Borrow<T> for Twhere
T: ?Sized,

impl<T> BorrowMut<T> for Twhere
T: ?Sized,

impl<T, U> Into<U> for Twhere
U: From<T>,

impl<T, U> TryFrom<U> for Twhere
U: Into<T>,

impl<T, U> TryInto<U> for Twhere
U: TryFrom<T>,