1#[doc = "Register `PCON` reader"]
2pub type R = crate::R<PCON_SPEC>;
3#[doc = "Register `PCON` writer"]
4pub type W = crate::W<PCON_SPEC>;
5#[doc = "Instruction Prefetch Buffer Bypass\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum IBYP_A {
8 #[doc = "0: Instruction prefetch buffer not bypassed."]
9 VALUE1 = 0,
10 #[doc = "1: Instruction prefetch buffer bypassed."]
11 VALUE2 = 1,
12}
13impl From<IBYP_A> for bool {
14 #[inline(always)]
15 fn from(variant: IBYP_A) -> Self {
16 variant as u8 != 0
17 }
18}
19#[doc = "Field `IBYP` reader - Instruction Prefetch Buffer Bypass"]
20pub type IBYP_R = crate::BitReader<IBYP_A>;
21impl IBYP_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> IBYP_A {
25 match self.bits {
26 false => IBYP_A::VALUE1,
27 true => IBYP_A::VALUE2,
28 }
29 }
30 #[doc = "Instruction prefetch buffer not bypassed."]
31 #[inline(always)]
32 pub fn is_value1(&self) -> bool {
33 *self == IBYP_A::VALUE1
34 }
35 #[doc = "Instruction prefetch buffer bypassed."]
36 #[inline(always)]
37 pub fn is_value2(&self) -> bool {
38 *self == IBYP_A::VALUE2
39 }
40}
41#[doc = "Field `IBYP` writer - Instruction Prefetch Buffer Bypass"]
42pub type IBYP_W<'a, REG> = crate::BitWriter<'a, REG, IBYP_A>;
43impl<'a, REG> IBYP_W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "Instruction prefetch buffer not bypassed."]
48 #[inline(always)]
49 pub fn value1(self) -> &'a mut crate::W<REG> {
50 self.variant(IBYP_A::VALUE1)
51 }
52 #[doc = "Instruction prefetch buffer bypassed."]
53 #[inline(always)]
54 pub fn value2(self) -> &'a mut crate::W<REG> {
55 self.variant(IBYP_A::VALUE2)
56 }
57}
58#[doc = "Instruction Prefetch Buffer Invalidate\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum IINV_A {
61 #[doc = "0: No effect."]
62 VALUE1 = 0,
63 #[doc = "1: Initiate invalidation of entire instruction cache."]
64 VALUE2 = 1,
65}
66impl From<IINV_A> for bool {
67 #[inline(always)]
68 fn from(variant: IINV_A) -> Self {
69 variant as u8 != 0
70 }
71}
72#[doc = "Field `IINV` writer - Instruction Prefetch Buffer Invalidate"]
73pub type IINV_W<'a, REG> = crate::BitWriter<'a, REG, IINV_A>;
74impl<'a, REG> IINV_W<'a, REG>
75where
76 REG: crate::Writable + crate::RegisterSpec,
77{
78 #[doc = "No effect."]
79 #[inline(always)]
80 pub fn value1(self) -> &'a mut crate::W<REG> {
81 self.variant(IINV_A::VALUE1)
82 }
83 #[doc = "Initiate invalidation of entire instruction cache."]
84 #[inline(always)]
85 pub fn value2(self) -> &'a mut crate::W<REG> {
86 self.variant(IINV_A::VALUE2)
87 }
88}
89impl R {
90 #[doc = "Bit 0 - Instruction Prefetch Buffer Bypass"]
91 #[inline(always)]
92 pub fn ibyp(&self) -> IBYP_R {
93 IBYP_R::new((self.bits & 1) != 0)
94 }
95}
96impl W {
97 #[doc = "Bit 0 - Instruction Prefetch Buffer Bypass"]
98 #[inline(always)]
99 pub fn ibyp(&mut self) -> IBYP_W<PCON_SPEC> {
100 IBYP_W::new(self, 0)
101 }
102 #[doc = "Bit 1 - Instruction Prefetch Buffer Invalidate"]
103 #[inline(always)]
104 pub fn iinv(&mut self) -> IINV_W<PCON_SPEC> {
105 IINV_W::new(self, 1)
106 }
107}
108#[doc = "Prefetch Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcon::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcon::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
109pub struct PCON_SPEC;
110impl crate::RegisterSpec for PCON_SPEC {
111 type Ux = u32;
112}
113#[doc = "`read()` method returns [`pcon::R`](R) reader structure"]
114impl crate::Readable for PCON_SPEC {}
115#[doc = "`write(|w| ..)` method takes [`pcon::W`](W) writer structure"]
116impl crate::Writable for PCON_SPEC {
117 type Safety = crate::Unsafe;
118 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
119 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
120}
121#[doc = "`reset()` method sets PCON to value 0"]
122impl crate::Resettable for PCON_SPEC {
123 const RESET_VALUE: u32 = 0;
124}