pub struct PPB { /* private fields */ }
Expand description
Cortex-M4 Private Peripheral Block
Implementations§
source§impl PPB
impl PPB
sourcepub const PTR: *const RegisterBlock = {0xe000e000 as *const ppb::RegisterBlock}
pub const PTR: *const RegisterBlock = {0xe000e000 as *const ppb::RegisterBlock}
Pointer to the register block
sourcepub const fn ptr() -> *const RegisterBlock
pub const fn ptr() -> *const RegisterBlock
Return the pointer to the register block
sourcepub unsafe fn steal() -> Self
pub unsafe fn steal() -> Self
Steal an instance of this peripheral
§Safety
Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.
Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.
Methods from Deref<Target = RegisterBlock>§
sourcepub fn syst_calib(&self) -> &SYST_CALIB
pub fn syst_calib(&self) -> &SYST_CALIB
0x1c - SysTick Calibration Value Register r
sourcepub fn nvic_iser0(&self) -> &NVIC_ISER0
pub fn nvic_iser0(&self) -> &NVIC_ISER0
0x100 - Interrupt Set-enable Register 0
sourcepub fn nvic_iser1(&self) -> &NVIC_ISER1
pub fn nvic_iser1(&self) -> &NVIC_ISER1
0x104 - Interrupt Set-enable Register 1
sourcepub fn nvic_iser2(&self) -> &NVIC_ISER2
pub fn nvic_iser2(&self) -> &NVIC_ISER2
0x108 - Interrupt Set-enable Register 2
sourcepub fn nvic_iser3(&self) -> &NVIC_ISER3
pub fn nvic_iser3(&self) -> &NVIC_ISER3
0x10c - Interrupt Set-enable Register 3
sourcepub fn nvic_icer0(&self) -> &NVIC_ICER0
pub fn nvic_icer0(&self) -> &NVIC_ICER0
0x180 - Interrupt Clear-enable Register 0
sourcepub fn nvic_icer1(&self) -> &NVIC_ICER1
pub fn nvic_icer1(&self) -> &NVIC_ICER1
0x184 - Interrupt Clear-enable Register 1
sourcepub fn nvic_icer2(&self) -> &NVIC_ICER2
pub fn nvic_icer2(&self) -> &NVIC_ICER2
0x188 - Interrupt Clear-enable Register 2
sourcepub fn nvic_icer3(&self) -> &NVIC_ICER3
pub fn nvic_icer3(&self) -> &NVIC_ICER3
0x18c - Interrupt Clear-enable Register 3
sourcepub fn nvic_ispr0(&self) -> &NVIC_ISPR0
pub fn nvic_ispr0(&self) -> &NVIC_ISPR0
0x200 - Interrupt Set-pending Register 0
sourcepub fn nvic_ispr1(&self) -> &NVIC_ISPR1
pub fn nvic_ispr1(&self) -> &NVIC_ISPR1
0x204 - Interrupt Set-pending Register 1
sourcepub fn nvic_ispr2(&self) -> &NVIC_ISPR2
pub fn nvic_ispr2(&self) -> &NVIC_ISPR2
0x208 - Interrupt Set-pending Register 2
sourcepub fn nvic_ispr3(&self) -> &NVIC_ISPR3
pub fn nvic_ispr3(&self) -> &NVIC_ISPR3
0x20c - Interrupt Set-pending Register 3
sourcepub fn nvic_icpr0(&self) -> &NVIC_ICPR0
pub fn nvic_icpr0(&self) -> &NVIC_ICPR0
0x280 - Interrupt Clear-pending Register 0
sourcepub fn nvic_icpr1(&self) -> &NVIC_ICPR1
pub fn nvic_icpr1(&self) -> &NVIC_ICPR1
0x284 - Interrupt Clear-pending Register 1
sourcepub fn nvic_icpr2(&self) -> &NVIC_ICPR2
pub fn nvic_icpr2(&self) -> &NVIC_ICPR2
0x288 - Interrupt Clear-pending Register 2
sourcepub fn nvic_icpr3(&self) -> &NVIC_ICPR3
pub fn nvic_icpr3(&self) -> &NVIC_ICPR3
0x28c - Interrupt Clear-pending Register 3
sourcepub fn nvic_iabr0(&self) -> &NVIC_IABR0
pub fn nvic_iabr0(&self) -> &NVIC_IABR0
0x300 - Interrupt Active Bit Register 0
sourcepub fn nvic_iabr1(&self) -> &NVIC_IABR1
pub fn nvic_iabr1(&self) -> &NVIC_IABR1
0x304 - Interrupt Active Bit Register 1
sourcepub fn nvic_iabr2(&self) -> &NVIC_IABR2
pub fn nvic_iabr2(&self) -> &NVIC_IABR2
0x308 - Interrupt Active Bit Register 2
sourcepub fn nvic_iabr3(&self) -> &NVIC_IABR3
pub fn nvic_iabr3(&self) -> &NVIC_IABR3
0x30c - Interrupt Active Bit Register 3
sourcepub fn nvic_ipr10(&self) -> &NVIC_IPR10
pub fn nvic_ipr10(&self) -> &NVIC_IPR10
0x428 - Interrupt Priority Register 10
sourcepub fn nvic_ipr11(&self) -> &NVIC_IPR11
pub fn nvic_ipr11(&self) -> &NVIC_IPR11
0x42c - Interrupt Priority Register 11
sourcepub fn nvic_ipr12(&self) -> &NVIC_IPR12
pub fn nvic_ipr12(&self) -> &NVIC_IPR12
0x430 - Interrupt Priority Register 12
sourcepub fn nvic_ipr13(&self) -> &NVIC_IPR13
pub fn nvic_ipr13(&self) -> &NVIC_IPR13
0x434 - Interrupt Priority Register 13
sourcepub fn nvic_ipr14(&self) -> &NVIC_IPR14
pub fn nvic_ipr14(&self) -> &NVIC_IPR14
0x438 - Interrupt Priority Register 14
sourcepub fn nvic_ipr15(&self) -> &NVIC_IPR15
pub fn nvic_ipr15(&self) -> &NVIC_IPR15
0x43c - Interrupt Priority Register 15
sourcepub fn nvic_ipr16(&self) -> &NVIC_IPR16
pub fn nvic_ipr16(&self) -> &NVIC_IPR16
0x440 - Interrupt Priority Register 16
sourcepub fn nvic_ipr17(&self) -> &NVIC_IPR17
pub fn nvic_ipr17(&self) -> &NVIC_IPR17
0x444 - Interrupt Priority Register 17
sourcepub fn nvic_ipr18(&self) -> &NVIC_IPR18
pub fn nvic_ipr18(&self) -> &NVIC_IPR18
0x448 - Interrupt Priority Register 18
sourcepub fn nvic_ipr19(&self) -> &NVIC_IPR19
pub fn nvic_ipr19(&self) -> &NVIC_IPR19
0x44c - Interrupt Priority Register 19
sourcepub fn nvic_ipr20(&self) -> &NVIC_IPR20
pub fn nvic_ipr20(&self) -> &NVIC_IPR20
0x450 - Interrupt Priority Register 20
sourcepub fn nvic_ipr21(&self) -> &NVIC_IPR21
pub fn nvic_ipr21(&self) -> &NVIC_IPR21
0x454 - Interrupt Priority Register 21
sourcepub fn nvic_ipr22(&self) -> &NVIC_IPR22
pub fn nvic_ipr22(&self) -> &NVIC_IPR22
0x458 - Interrupt Priority Register 22
sourcepub fn nvic_ipr23(&self) -> &NVIC_IPR23
pub fn nvic_ipr23(&self) -> &NVIC_IPR23
0x45c - Interrupt Priority Register 23
sourcepub fn nvic_ipr24(&self) -> &NVIC_IPR24
pub fn nvic_ipr24(&self) -> &NVIC_IPR24
0x460 - Interrupt Priority Register 24
sourcepub fn nvic_ipr25(&self) -> &NVIC_IPR25
pub fn nvic_ipr25(&self) -> &NVIC_IPR25
0x464 - Interrupt Priority Register 25
sourcepub fn nvic_ipr26(&self) -> &NVIC_IPR26
pub fn nvic_ipr26(&self) -> &NVIC_IPR26
0x468 - Interrupt Priority Register 26
sourcepub fn nvic_ipr27(&self) -> &NVIC_IPR27
pub fn nvic_ipr27(&self) -> &NVIC_IPR27
0x46c - Interrupt Priority Register 27
sourcepub fn mpu_rbar_a1(&self) -> &MPU_RBAR_A1
pub fn mpu_rbar_a1(&self) -> &MPU_RBAR_A1
0xda4 - MPU Region Base Address Register A1
sourcepub fn mpu_rasr_a1(&self) -> &MPU_RASR_A1
pub fn mpu_rasr_a1(&self) -> &MPU_RASR_A1
0xda8 - MPU Region Attribute and Size Register A1
sourcepub fn mpu_rbar_a2(&self) -> &MPU_RBAR_A2
pub fn mpu_rbar_a2(&self) -> &MPU_RBAR_A2
0xdac - MPU Region Base Address Register A2
sourcepub fn mpu_rasr_a2(&self) -> &MPU_RASR_A2
pub fn mpu_rasr_a2(&self) -> &MPU_RASR_A2
0xdb0 - MPU Region Attribute and Size Register A2
sourcepub fn mpu_rbar_a3(&self) -> &MPU_RBAR_A3
pub fn mpu_rbar_a3(&self) -> &MPU_RBAR_A3
0xdb4 - MPU Region Base Address Register A3
sourcepub fn mpu_rasr_a3(&self) -> &MPU_RASR_A3
pub fn mpu_rasr_a3(&self) -> &MPU_RASR_A3
0xdb8 - MPU Region Attribute and Size Register A3