Type Alias xmc4300::scu_parity::pmtsr::W

pub type W = W<PMTSR_SPEC>;

Register PMTSR writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn mtenps(&mut self) -> MTENPS_W<'_, PMTSR_SPEC>

Bit 0 - Test Enable Control for PSRAM

pub fn mtends1(&mut self) -> MTENDS1_W<'_, PMTSR_SPEC>

Bit 1 - Test Enable Control for DSRAM1

pub fn mteu0(&mut self) -> MTEU0_W<'_, PMTSR_SPEC>

Bit 8 - Test Enable Control for USIC0 Memory

pub fn mteu1(&mut self) -> MTEU1_W<'_, PMTSR_SPEC>

Bit 9 - Test Enable Control for USIC1 Memory

pub fn mtemc(&mut self) -> MTEMC_W<'_, PMTSR_SPEC>

Bit 12 - Test Enable Control for MultiCAN Memory

pub fn mtepprf(&mut self) -> MTEPPRF_W<'_, PMTSR_SPEC>

Bit 13 - Test Enable Control for PMU Prefetch Memory

pub fn mtusb(&mut self) -> MTUSB_W<'_, PMTSR_SPEC>

Bit 16 - Test Enable Control for USB Memory

pub fn mteth0tx(&mut self) -> MTETH0TX_W<'_, PMTSR_SPEC>

Bit 17 - Test Enable Control for ETH TX Memory

pub fn mteth0rx(&mut self) -> MTETH0RX_W<'_, PMTSR_SPEC>

Bit 18 - Test Enable Control for ETH RX Memory

pub fn mtsd0(&mut self) -> MTSD0_W<'_, PMTSR_SPEC>

Bit 19 - Test Enable Control for SDMMC Memory 0

pub fn mtsd1(&mut self) -> MTSD1_W<'_, PMTSR_SPEC>

Bit 20 - Test Enable Control for SDMMC Memory 1

pub fn mtecat0(&mut self) -> MTECAT0_W<'_, PMTSR_SPEC>

Bit 24 - Test Enable Control for ECAT0 Memory