xmc4300/port14/
iocr12.rs

1#[doc = "Register `IOCR12` reader"]
2pub type R = crate::R<IOCR12_SPEC>;
3#[doc = "Register `IOCR12` writer"]
4pub type W = crate::W<IOCR12_SPEC>;
5#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"]
6pub type PC12_R = crate::FieldReader;
7#[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"]
8pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"]
10pub type PC13_R = crate::FieldReader;
11#[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"]
12pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
13#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"]
14pub type PC14_R = crate::FieldReader;
15#[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"]
16pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
17#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"]
18pub type PC15_R = crate::FieldReader;
19#[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"]
20pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
21impl R {
22    #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"]
23    #[inline(always)]
24    pub fn pc12(&self) -> PC12_R {
25        PC12_R::new(((self.bits >> 3) & 0x1f) as u8)
26    }
27    #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"]
28    #[inline(always)]
29    pub fn pc13(&self) -> PC13_R {
30        PC13_R::new(((self.bits >> 11) & 0x1f) as u8)
31    }
32    #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"]
33    #[inline(always)]
34    pub fn pc14(&self) -> PC14_R {
35        PC14_R::new(((self.bits >> 19) & 0x1f) as u8)
36    }
37    #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"]
38    #[inline(always)]
39    pub fn pc15(&self) -> PC15_R {
40        PC15_R::new(((self.bits >> 27) & 0x1f) as u8)
41    }
42}
43impl W {
44    #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"]
45    #[inline(always)]
46    pub fn pc12(&mut self) -> PC12_W<IOCR12_SPEC> {
47        PC12_W::new(self, 3)
48    }
49    #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"]
50    #[inline(always)]
51    pub fn pc13(&mut self) -> PC13_W<IOCR12_SPEC> {
52        PC13_W::new(self, 11)
53    }
54    #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"]
55    #[inline(always)]
56    pub fn pc14(&mut self) -> PC14_W<IOCR12_SPEC> {
57        PC14_W::new(self, 19)
58    }
59    #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"]
60    #[inline(always)]
61    pub fn pc15(&mut self) -> PC15_W<IOCR12_SPEC> {
62        PC15_W::new(self, 27)
63    }
64}
65#[doc = "Port 14 Input/Output Control Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
66pub struct IOCR12_SPEC;
67impl crate::RegisterSpec for IOCR12_SPEC {
68    type Ux = u32;
69}
70#[doc = "`read()` method returns [`iocr12::R`](R) reader structure"]
71impl crate::Readable for IOCR12_SPEC {}
72#[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"]
73impl crate::Writable for IOCR12_SPEC {
74    type Safety = crate::Unsafe;
75    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
76    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
77}
78#[doc = "`reset()` method sets IOCR12 to value 0"]
79impl crate::Resettable for IOCR12_SPEC {
80    const RESET_VALUE: u32 = 0;
81}
xmc4300/port14/iocr12.rs

xmc4300/port14/
iocr12.rs
