Type Alias xmc4200::gpdma0::masktfr::W

pub type W = W<MASKTFR_SPEC>;

Register MASKTFR writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn ch0(&mut self) -> CH0_W<'_, MASKTFR_SPEC>

Bit 0 - Mask bit for channel 0

pub fn ch1(&mut self) -> CH1_W<'_, MASKTFR_SPEC>

Bit 1 - Mask bit for channel 1

pub fn ch2(&mut self) -> CH2_W<'_, MASKTFR_SPEC>

Bit 2 - Mask bit for channel 2

pub fn ch3(&mut self) -> CH3_W<'_, MASKTFR_SPEC>

Bit 3 - Mask bit for channel 3

pub fn ch4(&mut self) -> CH4_W<'_, MASKTFR_SPEC>

Bit 4 - Mask bit for channel 4

pub fn ch5(&mut self) -> CH5_W<'_, MASKTFR_SPEC>

Bit 5 - Mask bit for channel 5

pub fn ch6(&mut self) -> CH6_W<'_, MASKTFR_SPEC>

Bit 6 - Mask bit for channel 6

pub fn ch7(&mut self) -> CH7_W<'_, MASKTFR_SPEC>

Bit 7 - Mask bit for channel 7

pub fn we_ch0(&mut self) -> WE_CH0_W<'_, MASKTFR_SPEC>

Bit 8 - Write enable for mask bit of channel 0

pub fn we_ch1(&mut self) -> WE_CH1_W<'_, MASKTFR_SPEC>

Bit 9 - Write enable for mask bit of channel 1

pub fn we_ch2(&mut self) -> WE_CH2_W<'_, MASKTFR_SPEC>

Bit 10 - Write enable for mask bit of channel 2

pub fn we_ch3(&mut self) -> WE_CH3_W<'_, MASKTFR_SPEC>

Bit 11 - Write enable for mask bit of channel 3

pub fn we_ch4(&mut self) -> WE_CH4_W<'_, MASKTFR_SPEC>

Bit 12 - Write enable for mask bit of channel 4

pub fn we_ch5(&mut self) -> WE_CH5_W<'_, MASKTFR_SPEC>

Bit 13 - Write enable for mask bit of channel 5

pub fn we_ch6(&mut self) -> WE_CH6_W<'_, MASKTFR_SPEC>

Bit 14 - Write enable for mask bit of channel 6

pub fn we_ch7(&mut self) -> WE_CH7_W<'_, MASKTFR_SPEC>

Bit 15 - Write enable for mask bit of channel 7