xmc4200/ppb/
nvic_iabr1.rs1#[doc = "Register `NVIC_IABR1` reader"]
2pub type R = crate::R<NVIC_IABR1_SPEC>;
3#[doc = "Register `NVIC_IABR1` writer"]
4pub type W = crate::W<NVIC_IABR1_SPEC>;
5#[doc = "Interrupt active flags:\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u32)]
8pub enum ACTIVE_A {
9 #[doc = "0: interrupt not active"]
10 VALUE1 = 0,
11 #[doc = "1: interrupt active"]
12 VALUE2 = 1,
13}
14impl From<ACTIVE_A> for u32 {
15 #[inline(always)]
16 fn from(variant: ACTIVE_A) -> Self {
17 variant as _
18 }
19}
20impl crate::FieldSpec for ACTIVE_A {
21 type Ux = u32;
22}
23impl crate::IsEnum for ACTIVE_A {}
24#[doc = "Field `ACTIVE` reader - Interrupt active flags:"]
25pub type ACTIVE_R = crate::FieldReader<ACTIVE_A>;
26impl ACTIVE_R {
27 #[doc = "Get enumerated values variant"]
28 #[inline(always)]
29 pub const fn variant(&self) -> Option<ACTIVE_A> {
30 match self.bits {
31 0 => Some(ACTIVE_A::VALUE1),
32 1 => Some(ACTIVE_A::VALUE2),
33 _ => None,
34 }
35 }
36 #[doc = "interrupt not active"]
37 #[inline(always)]
38 pub fn is_value1(&self) -> bool {
39 *self == ACTIVE_A::VALUE1
40 }
41 #[doc = "interrupt active"]
42 #[inline(always)]
43 pub fn is_value2(&self) -> bool {
44 *self == ACTIVE_A::VALUE2
45 }
46}
47#[doc = "Field `ACTIVE` writer - Interrupt active flags:"]
48pub type ACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, ACTIVE_A>;
49impl<'a, REG> ACTIVE_W<'a, REG>
50where
51 REG: crate::Writable + crate::RegisterSpec,
52 REG::Ux: From<u32>,
53{
54 #[doc = "interrupt not active"]
55 #[inline(always)]
56 pub fn value1(self) -> &'a mut crate::W<REG> {
57 self.variant(ACTIVE_A::VALUE1)
58 }
59 #[doc = "interrupt active"]
60 #[inline(always)]
61 pub fn value2(self) -> &'a mut crate::W<REG> {
62 self.variant(ACTIVE_A::VALUE2)
63 }
64}
65impl R {
66 #[doc = "Bits 0:31 - Interrupt active flags:"]
67 #[inline(always)]
68 pub fn active(&self) -> ACTIVE_R {
69 ACTIVE_R::new(self.bits)
70 }
71}
72impl W {
73 #[doc = "Bits 0:31 - Interrupt active flags:"]
74 #[inline(always)]
75 pub fn active(&mut self) -> ACTIVE_W<NVIC_IABR1_SPEC> {
76 ACTIVE_W::new(self, 0)
77 }
78}
79#[doc = "Interrupt Active Bit Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct NVIC_IABR1_SPEC;
81impl crate::RegisterSpec for NVIC_IABR1_SPEC {
82 type Ux = u32;
83}
84#[doc = "`read()` method returns [`nvic_iabr1::R`](R) reader structure"]
85impl crate::Readable for NVIC_IABR1_SPEC {}
86#[doc = "`write(|w| ..)` method takes [`nvic_iabr1::W`](W) writer structure"]
87impl crate::Writable for NVIC_IABR1_SPEC {
88 type Safety = crate::Unsafe;
89 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
90 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
91}
92#[doc = "`reset()` method sets NVIC_IABR1 to value 0"]
93impl crate::Resettable for NVIC_IABR1_SPEC {
94 const RESET_VALUE: u32 = 0;
95}