[−][src]Type Definition xmc4100::usic0_ch0::pcr_sscmode::R
type R = R<u32, PCR_SSCMODE>;
Reader of register PCR_SSCMode
Implementations
impl R
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pub fn mslsen(&self) -> MSLSEN_R
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Bit 0 - MSLS Enable
pub fn selctr(&self) -> SELCTR_R
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Bit 1 - Select Control
pub fn selinv(&self) -> SELINV_R
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Bit 2 - Select Inversion
pub fn fem(&self) -> FEM_R
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Bit 3 - Frame End Mode
pub fn ctqsel1(&self) -> CTQSEL1_R
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Bits 4:5 - Input Frequency Selection
pub fn pctq1(&self) -> PCTQ1_R
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Bits 6:7 - Divider Factor PCTQ1 for Tiw and Tnf
pub fn dctq1(&self) -> DCTQ1_R
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Bits 8:12 - Divider Factor DCTQ1 for Tiw and Tnf
pub fn parien(&self) -> PARIEN_R
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Bit 13 - Parity Error Interrupt Enable
pub fn mslsien(&self) -> MSLSIEN_R
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Bit 14 - MSLS Interrupt Enable
pub fn dx2tien(&self) -> DX2TIEN_R
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Bit 15 - DX2T Interrupt Enable
pub fn selo(&self) -> SELO_R
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Bits 16:23 - Select Output
pub fn tiwen(&self) -> TIWEN_R
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Bit 24 - Enable Inter-Word Delay Tiw
pub fn slphsel(&self) -> SLPHSEL_R
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Bit 25 - Slave Mode Clock Phase Select
pub fn mclk(&self) -> MCLK_R
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Bit 31 - Master Clock Enable