[−][src]Type Definition xmc4100::posif0::pconf::R
type R = R<u32, PCONF>;
Reader of register PCONF
Implementations
impl R
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pub fn fsel(&self) -> FSEL_R
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Bits 0:1 - Function Selector
pub fn qdcm(&self) -> QDCM_R
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Bit 2 - Position Decoder Mode selection
pub fn hidg(&self) -> HIDG_R
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Bit 4 - Idle generation enable
pub fn mcue(&self) -> MCUE_R
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Bit 5 - Multi-Channel Pattern SW update enable
pub fn insel0(&self) -> INSEL0_R
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Bits 8:9 - PhaseA/Hal input 1 selector
pub fn insel1(&self) -> INSEL1_R
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Bits 10:11 - PhaseB/Hall input 2 selector
pub fn insel2(&self) -> INSEL2_R
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Bits 12:13 - Index/Hall input 3 selector
pub fn dsel(&self) -> DSEL_R
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Bit 16 - Delay Pin selector
pub fn spes(&self) -> SPES_R
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Bit 17 - Edge selector for the sampling trigger
pub fn msets(&self) -> MSETS_R
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Bits 18:20 - Pattern update signal select
pub fn mses(&self) -> MSES_R
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Bit 21 - Multi-Channel pattern update trigger edge
pub fn msyns(&self) -> MSYNS_R
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Bits 22:23 - PWM synchronization signal selector
pub fn ewis(&self) -> EWIS_R
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Bits 24:25 - Wrong Hall Event selection
pub fn ewie(&self) -> EWIE_R
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Bit 26 - External Wrong Hall Event enable
pub fn ewil(&self) -> EWIL_R
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Bit 27 - External Wrong Hall Event active level
pub fn lpc(&self) -> LPC_R
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Bits 28:30 - Low Pass Filters Configuration