xmc4100/scu_parity/
persten.rs

1#[doc = "Register `PERSTEN` reader"]
2pub type R = crate::R<PERSTEN_SPEC>;
3#[doc = "Register `PERSTEN` writer"]
4pub type W = crate::W<PERSTEN_SPEC>;
5#[doc = "System Reset Enable upon Parity Error Trap\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum RSEN_A {
8    #[doc = "0: Reset request disabled"]
9    VALUE1 = 0,
10    #[doc = "1: Reset request enabled"]
11    VALUE2 = 1,
12}
13impl From<RSEN_A> for bool {
14    #[inline(always)]
15    fn from(variant: RSEN_A) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `RSEN` reader - System Reset Enable upon Parity Error Trap"]
20pub type RSEN_R = crate::BitReader<RSEN_A>;
21impl RSEN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> RSEN_A {
25        match self.bits {
26            false => RSEN_A::VALUE1,
27            true => RSEN_A::VALUE2,
28        }
29    }
30    #[doc = "Reset request disabled"]
31    #[inline(always)]
32    pub fn is_value1(&self) -> bool {
33        *self == RSEN_A::VALUE1
34    }
35    #[doc = "Reset request enabled"]
36    #[inline(always)]
37    pub fn is_value2(&self) -> bool {
38        *self == RSEN_A::VALUE2
39    }
40}
41#[doc = "Field `RSEN` writer - System Reset Enable upon Parity Error Trap"]
42pub type RSEN_W<'a, REG> = crate::BitWriter<'a, REG, RSEN_A>;
43impl<'a, REG> RSEN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Reset request disabled"]
48    #[inline(always)]
49    pub fn value1(self) -> &'a mut crate::W<REG> {
50        self.variant(RSEN_A::VALUE1)
51    }
52    #[doc = "Reset request enabled"]
53    #[inline(always)]
54    pub fn value2(self) -> &'a mut crate::W<REG> {
55        self.variant(RSEN_A::VALUE2)
56    }
57}
58impl R {
59    #[doc = "Bit 0 - System Reset Enable upon Parity Error Trap"]
60    #[inline(always)]
61    pub fn rsen(&self) -> RSEN_R {
62        RSEN_R::new((self.bits & 1) != 0)
63    }
64}
65impl W {
66    #[doc = "Bit 0 - System Reset Enable upon Parity Error Trap"]
67    #[inline(always)]
68    pub fn rsen(&mut self) -> RSEN_W<PERSTEN_SPEC> {
69        RSEN_W::new(self, 0)
70    }
71}
72#[doc = "Parity Error Reset Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`persten::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`persten::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
73pub struct PERSTEN_SPEC;
74impl crate::RegisterSpec for PERSTEN_SPEC {
75    type Ux = u32;
76}
77#[doc = "`read()` method returns [`persten::R`](R) reader structure"]
78impl crate::Readable for PERSTEN_SPEC {}
79#[doc = "`write(|w| ..)` method takes [`persten::W`](W) writer structure"]
80impl crate::Writable for PERSTEN_SPEC {
81    type Safety = crate::Unsafe;
82    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
83    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
84}
85#[doc = "`reset()` method sets PERSTEN to value 0"]
86impl crate::Resettable for PERSTEN_SPEC {
87    const RESET_VALUE: u32 = 0;
88}
xmc4100/scu_parity/persten.rs

xmc4100/scu_parity/
persten.rs
