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#[doc = r" Value read from the register"] pub struct R { bits: u32, } impl super::C3V { #[doc = r" Reads the contents of the register"] #[inline] pub fn read(&self) -> R { R { bits: self.register.get(), } } } #[doc = r" Value of the field"] pub struct CAPTVR { bits: u16, } impl CAPTVR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u16 { self.bits } } #[doc = r" Value of the field"] pub struct FPCVR { bits: u8, } impl FPCVR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u8 { self.bits } } #[doc = "Possible values of the field `FFL`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum FFLR { #[doc = "No new value was captured into the specific capture register"] VALUE1, #[doc = "A new value was captured into the specific register"] VALUE2, } impl FFLR { #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { match *self { FFLR::VALUE1 => false, FFLR::VALUE2 => true, } } #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _from(value: bool) -> FFLR { match value { false => FFLR::VALUE1, true => FFLR::VALUE2, } } #[doc = "Checks if the value of the field is `VALUE1`"] #[inline] pub fn is_value1(&self) -> bool { *self == FFLR::VALUE1 } #[doc = "Checks if the value of the field is `VALUE2`"] #[inline] pub fn is_value2(&self) -> bool { *self == FFLR::VALUE2 } } impl R { #[doc = r" Value of the register as raw bits"] #[inline] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bits 0:15 - Capture Value"] #[inline] pub fn captv(&self) -> CAPTVR { let bits = { const MASK: u16 = 65535; const OFFSET: u8 = 0; ((self.bits >> OFFSET) & MASK as u32) as u16 }; CAPTVR { bits } } #[doc = "Bits 16:19 - Prescaler Value"] #[inline] pub fn fpcv(&self) -> FPCVR { let bits = { const MASK: u8 = 15; const OFFSET: u8 = 16; ((self.bits >> OFFSET) & MASK as u32) as u8 }; FPCVR { bits } } #[doc = "Bit 20 - Full Flag"] #[inline] pub fn ffl(&self) -> FFLR { FFLR::_from({ const MASK: bool = true; const OFFSET: u8 = 20; ((self.bits >> OFFSET) & MASK as u32) != 0 }) } }