[][src]Struct x86_64_xsave::MxcsrRegisterValue

#[repr(transparent)]
pub struct MxcsrRegisterValue(_);

The 32-bit MXCSR register contains control and status information for SSE, SSE2, and SSE3 SIMD floating-point operations.

This register contains:-

  • flag and mask bits for SIMD floating-point exceptions;
  • rounding control field for SIMD floating-point operations;
  • flush-to-zero flag that provides a means of controlling underflow conditions on SIMD floating-point operations;
  • denormals-are-zeros flag that controls how SIMD floating-point instructions handle denormal source operands

Methods

impl MxcsrRegisterValue[src]

pub fn save_current_value_in_register() -> Self[src]

Get current value in register.

pub fn restore_current_value_in_register(&self)[src]

Set current value in register.

Only affects the current thread.

pub fn update_from_current_value_in_register(&mut self)[src]

Update the current value of the MXCSR register.

pub fn denormals_are_zeros(self) -> bool[src]

Denormals Are Zeros, DAZ.

pub fn flag_bits(self) -> u8[src]

Flag bits 0 to 5 inclusive.

A 6-bit (u6) value.

pub fn invalid_operation_flag(self) -> bool[src]

Invalid Operation exception flag, IE.

pub fn denormal_flag(self) -> bool[src]

Denormal exception flag, DE.

pub fn divide_by_zero_flag(self) -> bool[src]

Divide-by-Zero exception flag, ZE.

pub fn overflow_flag(self) -> bool[src]

Overflow exception flag, OE.

pub fn underflow_flag(self) -> bool[src]

Underflow exception flag, UE.

pub fn precision_flag(self) -> bool[src]

Precision exception flag, PE.

pub fn mask_bits(self) -> u8[src]

Flag bits 0 to 5 inclusive.

A 6-bit (u6) value.

pub fn invalid_operation_mask_bit(self) -> bool[src]

Invalid Operation exception mask bit, IM.

pub fn denormal_mask_bit(self) -> bool[src]

Denormal exception mask bit, DM.

pub fn divide_by_zero_mask_bit(self) -> bool[src]

Divide-by-Zero exception mask bit, ZM.

pub fn overflow_mask_bit(self) -> bool[src]

Overflow exception mask bit, OM.

pub fn underflow_mask_bit(self) -> bool[src]

Underflow exception mask bit, UM.

pub fn precision_mask_bit(self) -> bool[src]

Precision exception mask bit, PM.

pub fn rounding_control(self) -> RoundingControl[src]

Rounding control, RC.

pub fn flush_to_zero(self) -> bool[src]

Precision exception mask bit, PM.

Trait Implementations

impl PartialOrd<MxcsrRegisterValue> for MxcsrRegisterValue[src]

impl PartialEq<MxcsrRegisterValue> for MxcsrRegisterValue[src]

impl Default for MxcsrRegisterValue[src]

impl Clone for MxcsrRegisterValue[src]

fn clone_from(&mut self, source: &Self)
1.0.0
[src]

Performs copy-assignment from source. Read more

impl Ord for MxcsrRegisterValue[src]

fn max(self, other: Self) -> Self
1.21.0
[src]

Compares and returns the maximum of two values. Read more

fn min(self, other: Self) -> Self
1.21.0
[src]

Compares and returns the minimum of two values. Read more

impl Eq for MxcsrRegisterValue[src]

impl Debug for MxcsrRegisterValue[src]

impl Hash for MxcsrRegisterValue[src]

fn hash_slice<H>(data: &[Self], state: &mut H) where
    H: Hasher
1.3.0
[src]

Feeds a slice of this type into the given [Hasher]. Read more

Auto Trait Implementations

Blanket Implementations

impl<T, U> Into for T where
    U: From<T>, 
[src]

impl<T> ToOwned for T where
    T: Clone
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type Owned = T

impl<T> From for T[src]

impl<T, U> TryFrom for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T> Borrow for T where
    T: ?Sized
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impl<T> BorrowMut for T where
    T: ?Sized
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impl<T, U> TryInto for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Any for T where
    T: 'static + ?Sized
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