[−][src]Struct x86_64_xsave::MxcsrRegisterValue
The 32-bit MXCSR register contains control and status information for SSE
, SSE2
, and SSE3
SIMD floating-point operations.
This register contains:-
- flag and mask bits for SIMD floating-point exceptions;
- rounding control field for SIMD floating-point operations;
- flush-to-zero flag that provides a means of controlling underflow conditions on SIMD floating-point operations;
- denormals-are-zeros flag that controls how SIMD floating-point instructions handle denormal source operands
Methods
impl MxcsrRegisterValue
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pub fn save_current_value_in_register() -> Self
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Get current value in register.
pub fn restore_current_value_in_register(&self)
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Set current value in register.
Only affects the current thread.
pub fn update_from_current_value_in_register(&mut self)
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Update the current value of the MXCSR register.
pub fn denormals_are_zeros(self) -> bool
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Denormals Are Zeros, DAZ
.
pub fn flag_bits(self) -> u8
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Flag bits 0 to 5 inclusive.
A 6-bit (u6
) value.
pub fn invalid_operation_flag(self) -> bool
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Invalid Operation exception flag, IE
.
pub fn denormal_flag(self) -> bool
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Denormal exception flag, DE
.
pub fn divide_by_zero_flag(self) -> bool
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Divide-by-Zero exception flag, ZE
.
pub fn overflow_flag(self) -> bool
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Overflow exception flag, OE
.
pub fn underflow_flag(self) -> bool
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Underflow exception flag, UE
.
pub fn precision_flag(self) -> bool
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Precision exception flag, PE
.
pub fn mask_bits(self) -> u8
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Flag bits 0 to 5 inclusive.
A 6-bit (u6
) value.
pub fn invalid_operation_mask_bit(self) -> bool
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Invalid Operation exception mask bit, IM
.
pub fn denormal_mask_bit(self) -> bool
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Denormal exception mask bit, DM
.
pub fn divide_by_zero_mask_bit(self) -> bool
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Divide-by-Zero exception mask bit, ZM
.
pub fn overflow_mask_bit(self) -> bool
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Overflow exception mask bit, OM
.
pub fn underflow_mask_bit(self) -> bool
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Underflow exception mask bit, UM
.
pub fn precision_mask_bit(self) -> bool
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Precision exception mask bit, PM
.
pub fn rounding_control(self) -> RoundingControl
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Rounding control, RC
.
pub fn flush_to_zero(self) -> bool
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Precision exception mask bit, PM
.
Trait Implementations
impl PartialOrd<MxcsrRegisterValue> for MxcsrRegisterValue
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fn partial_cmp(&self, other: &MxcsrRegisterValue) -> Option<Ordering>
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fn lt(&self, other: &MxcsrRegisterValue) -> bool
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fn le(&self, other: &MxcsrRegisterValue) -> bool
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fn gt(&self, other: &MxcsrRegisterValue) -> bool
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fn ge(&self, other: &MxcsrRegisterValue) -> bool
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impl PartialEq<MxcsrRegisterValue> for MxcsrRegisterValue
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fn eq(&self, other: &MxcsrRegisterValue) -> bool
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fn ne(&self, other: &MxcsrRegisterValue) -> bool
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impl Default for MxcsrRegisterValue
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fn default() -> MxcsrRegisterValue
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impl Clone for MxcsrRegisterValue
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fn clone(&self) -> MxcsrRegisterValue
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fn clone_from(&mut self, source: &Self)
1.0.0[src]
Performs copy-assignment from source
. Read more
impl Ord for MxcsrRegisterValue
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fn cmp(&self, other: &MxcsrRegisterValue) -> Ordering
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fn max(self, other: Self) -> Self
1.21.0[src]
Compares and returns the maximum of two values. Read more
fn min(self, other: Self) -> Self
1.21.0[src]
Compares and returns the minimum of two values. Read more
impl Eq for MxcsrRegisterValue
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impl Debug for MxcsrRegisterValue
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impl Hash for MxcsrRegisterValue
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Auto Trait Implementations
impl Send for MxcsrRegisterValue
impl Sync for MxcsrRegisterValue
Blanket Implementations
impl<T, U> Into for T where
U: From<T>,
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U: From<T>,
impl<T> ToOwned for T where
T: Clone,
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T: Clone,
impl<T> From for T
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impl<T, U> TryFrom for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T> Borrow for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
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impl<T, U> TryInto for T where
U: TryFrom<T>,
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U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>
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impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,