[][src]Struct wishbone_tool::riscv::RiscvCpuController

pub struct RiscvCpuController { /* fields omitted */ }

Implementations

impl RiscvCpuController[src]

pub fn poll(
    &self,
    bridge: &Bridge,
    gdb_controller: &mut GdbController
) -> Result<bool, RiscvCpuError>
[src]

Poll the CPU and determine if it's running or not. If it transitions between states, handle this transition as appropriate.

pub fn interrupts_enabled(&self, bridge: &Bridge) -> Result<bool, RiscvCpuError>[src]

pub fn get_current_trap(
    &self,
    bridge: &Bridge
) -> Result<RiscvException, RiscvCpuError>
[src]

Return the current CPU trap, which could be an interrupt or an exception.

Auto Trait Implementations

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.