Module chip 

Chip-architecture-aware properties for the ESP32 (Dew) backend.

The ESP32 family spans two instruction set architectures: the original Xtensa cores (esp32, esp32s2, esp32s3) and the newer RISC-V cores (esp32c3, esp32c6, …). Almost everything the CLI does for an ESP32 target — the Rust target triple, the QEMU system binary and machine model, whether QEMU needs the eFuse ADC-calibration workaround, the firmware console transport, the flash size, the main-task stack, and the codegen optimization level — follows directly from the chip’s architecture.

Esp32Chip parses a chip string once and answers all of those questions, so the rest of the backend never has to special-case a chip by name.

Structs

Esp32FirmwareParams

Chip-specific firmware harness parameters.

Esp32GccComponent

Location of a chip’s GCC toolchain within the espup esp toolchain.

Enums

Esp32Arch

The instruction set architecture of an ESP32-class chip.

Esp32Chip

A supported ESP32-class target chip.