w5500/
socket.rs

1use core::net::Ipv4Addr;
2
3use crate::bus::Bus;
4use crate::register::socketn;
5
6#[derive(Debug)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8pub struct Socket {
9    pub index: u8,
10    register: u8,
11    tx_buffer: u8,
12    rx_buffer: u8,
13}
14
15impl Socket {
16    /// 8 sockets available on the w5500
17    pub fn new(index: u8) -> Self {
18        /*
19         * Socket 0 is at address    0x01
20         * Socket 0 TX is at address 0x02
21         * Socket 0 RX is at address 0x03
22         * skip                      0x04
23         * Socket 1 is at address    0x05
24         * Socket 1 TX is at address 0x06
25         * Socket 1 RX is at address 0x07
26         * ...
27         */
28        let block = index * 4;
29        Socket {
30            index,
31            register: block + 1,
32            tx_buffer: block + 2,
33            rx_buffer: block + 3,
34        }
35    }
36
37    pub fn register(&self) -> u8 {
38        self.register
39    }
40    pub fn tx_buffer(&self) -> u8 {
41        self.tx_buffer
42    }
43    pub fn rx_buffer(&self) -> u8 {
44        self.rx_buffer
45    }
46
47    pub fn set_mode<SpiBus: Bus>(
48        &self,
49        bus: &mut SpiBus,
50        mode: socketn::Protocol,
51    ) -> Result<(), SpiBus::Error> {
52        let mode = [mode as u8];
53        bus.write_frame(self.register(), socketn::MODE, &mode)?;
54        Ok(())
55    }
56
57    pub fn get_status<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u8, SpiBus::Error> {
58        let mut data = [0u8];
59        bus.read_frame(self.register(), socketn::STATUS, &mut data)?;
60        Ok(data[0])
61    }
62
63    pub fn reset_interrupt<SpiBus: Bus>(
64        &self,
65        bus: &mut SpiBus,
66        code: socketn::Interrupt,
67    ) -> Result<(), SpiBus::Error> {
68        let data = [code as u8];
69        bus.write_frame(self.register(), socketn::INTERRUPT, &data)?;
70        Ok(())
71    }
72
73    pub fn has_interrupt<SpiBus: Bus>(
74        &self,
75        bus: &mut SpiBus,
76        code: socketn::Interrupt,
77    ) -> Result<bool, SpiBus::Error> {
78        let mut data = [0u8];
79        bus.read_frame(self.register(), socketn::INTERRUPT, &mut data)?;
80
81        Ok(data[0] & code as u8 != 0)
82    }
83
84    pub fn set_source_port<SpiBus: Bus>(
85        &self,
86        bus: &mut SpiBus,
87        port: u16,
88    ) -> Result<(), SpiBus::Error> {
89        let data = port.to_be_bytes();
90        bus.write_frame(self.register(), socketn::SOURCE_PORT, &data)?;
91        Ok(())
92    }
93
94    pub fn set_destination_ip<SpiBus: Bus>(
95        &self,
96        bus: &mut SpiBus,
97        ip: Ipv4Addr,
98    ) -> Result<(), SpiBus::Error> {
99        let data = ip.octets();
100        bus.write_frame(self.register(), socketn::DESTINATION_IP, &data)?;
101        Ok(())
102    }
103
104    pub fn set_destination_port<SpiBus: Bus>(
105        &self,
106        bus: &mut SpiBus,
107        port: u16,
108    ) -> Result<(), SpiBus::Error> {
109        let data = port.to_be_bytes();
110        bus.write_frame(self.register(), socketn::DESTINATION_PORT, &data)?;
111        Ok(())
112    }
113
114    pub fn get_tx_read_pointer<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
115        let mut data = [0u8; 2];
116        bus.read_frame(self.register(), socketn::TX_DATA_READ_POINTER, &mut data)?;
117        Ok(u16::from_be_bytes(data))
118    }
119
120    pub fn set_tx_read_pointer<SpiBus: Bus>(
121        &self,
122        bus: &mut SpiBus,
123        pointer: u16,
124    ) -> Result<(), SpiBus::Error> {
125        let data = pointer.to_be_bytes();
126        bus.write_frame(self.register(), socketn::TX_DATA_READ_POINTER, &data)?;
127        Ok(())
128    }
129
130    pub fn get_tx_write_pointer<SpiBus: Bus>(
131        &self,
132        bus: &mut SpiBus,
133    ) -> Result<u16, SpiBus::Error> {
134        let mut data = [0u8; 2];
135        bus.read_frame(self.register(), socketn::TX_DATA_WRITE_POINTER, &mut data)?;
136        Ok(u16::from_be_bytes(data))
137    }
138
139    pub fn set_tx_write_pointer<SpiBus: Bus>(
140        &self,
141        bus: &mut SpiBus,
142        pointer: u16,
143    ) -> Result<(), SpiBus::Error> {
144        let data = pointer.to_be_bytes();
145        bus.write_frame(self.register(), socketn::TX_DATA_WRITE_POINTER, &data)?;
146        Ok(())
147    }
148
149    pub fn get_rx_read_pointer<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
150        let mut data = [0u8; 2];
151        bus.read_frame(self.register(), socketn::RX_DATA_READ_POINTER, &mut data)?;
152        Ok(u16::from_be_bytes(data))
153    }
154
155    pub fn set_rx_read_pointer<SpiBus: Bus>(
156        &self,
157        bus: &mut SpiBus,
158        pointer: u16,
159    ) -> Result<(), SpiBus::Error> {
160        let data = pointer.to_be_bytes();
161        bus.write_frame(self.register(), socketn::RX_DATA_READ_POINTER, &data)?;
162        Ok(())
163    }
164
165    pub fn set_interrupt_mask<SpiBus: Bus>(
166        &self,
167        bus: &mut SpiBus,
168        mask: u8,
169    ) -> Result<(), SpiBus::Error> {
170        let data = [mask];
171        bus.write_frame(self.register(), socketn::INTERRUPT_MASK, &data)?;
172        Ok(())
173    }
174
175    pub fn command<SpiBus: Bus>(
176        &self,
177        bus: &mut SpiBus,
178        command: socketn::Command,
179    ) -> Result<(), SpiBus::Error> {
180        let data = [command as u8];
181        bus.write_frame(self.register(), socketn::COMMAND, &data)?;
182        Ok(())
183    }
184
185    /// Get the received bytes size of the socket's RX buffer.
186    ///
187    /// Section 4.2 of datasheet, Sn_TX_FSR address docs indicate that read must be repeated until two sequential reads are stable
188    pub fn get_receive_size<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
189        loop {
190            let mut sample_0 = [0u8; 2];
191            bus.read_frame(self.register(), socketn::RECEIVED_SIZE, &mut sample_0)?;
192            let mut sample_1 = [0u8; 2];
193            bus.read_frame(self.register(), socketn::RECEIVED_SIZE, &mut sample_1)?;
194            if sample_0 == sample_1 {
195                break Ok(u16::from_be_bytes(sample_0));
196            }
197        }
198    }
199
200    /// Get the free TX buffer size still available for this socket.
201    ///
202    /// It's cleared once we `SEND` the buffer over the socket.
203    pub fn get_tx_free_size<SpiBus: Bus>(&self, bus: &mut SpiBus) -> Result<u16, SpiBus::Error> {
204        let mut data = [0; 2];
205        bus.read_frame(self.register(), socketn::TX_FREE_SIZE, &mut data)?;
206        Ok(u16::from_be_bytes(data))
207    }
208}
209
210#[cfg(test)]
211mod test {
212    use crate::register::*;
213
214    use super::*;
215
216    #[test]
217    fn test_socket_registers() {
218        // Socket 0
219        {
220            let socket_0 = Socket::new(0);
221
222            assert_eq!(socket_0.register, SOCKET0);
223            assert_eq!(socket_0.tx_buffer, SOCKET0_BUFFER_TX);
224            assert_eq!(socket_0.rx_buffer, SOCKET0_BUFFER_RX);
225        }
226
227        // Socket 1
228        {
229            let socket_1 = Socket::new(1);
230
231            assert_eq!(socket_1.register, SOCKET1);
232            assert_eq!(socket_1.tx_buffer, SOCKET1_BUFFER_TX);
233            assert_eq!(socket_1.rx_buffer, SOCKET1_BUFFER_RX);
234        }
235
236        // Socket 2
237        {
238            let socket_2 = Socket::new(2);
239
240            assert_eq!(socket_2.register, SOCKET2);
241            assert_eq!(socket_2.tx_buffer, SOCKET2_BUFFER_TX);
242            assert_eq!(socket_2.rx_buffer, SOCKET2_BUFFER_RX);
243        }
244
245        // Socket 3
246        {
247            let socket_3 = Socket::new(3);
248
249            assert_eq!(socket_3.register, SOCKET3);
250            assert_eq!(socket_3.tx_buffer, SOCKET3_BUFFER_TX);
251            assert_eq!(socket_3.rx_buffer, SOCKET3_BUFFER_RX);
252        }
253
254        // Socket 4
255        {
256            let socket_4 = Socket::new(4);
257
258            assert_eq!(socket_4.register, SOCKET4);
259            assert_eq!(socket_4.tx_buffer, SOCKET4_BUFFER_TX);
260            assert_eq!(socket_4.rx_buffer, SOCKET4_BUFFER_RX);
261        }
262
263        // Socket 5
264        {
265            let socket_5 = Socket::new(5);
266
267            assert_eq!(socket_5.register, SOCKET5);
268            assert_eq!(socket_5.tx_buffer, SOCKET5_BUFFER_TX);
269            assert_eq!(socket_5.rx_buffer, SOCKET5_BUFFER_RX);
270        }
271
272        // Socket 6
273        {
274            let socket_6 = Socket::new(6);
275
276            assert_eq!(socket_6.register, SOCKET6);
277            assert_eq!(socket_6.tx_buffer, SOCKET6_BUFFER_TX);
278            assert_eq!(socket_6.rx_buffer, SOCKET6_BUFFER_RX);
279        }
280
281        // Socket 7
282        {
283            let socket_7 = Socket::new(7);
284
285            assert_eq!(socket_7.register, SOCKET7);
286            assert_eq!(socket_7.tx_buffer, SOCKET7_BUFFER_TX);
287            assert_eq!(socket_7.rx_buffer, SOCKET7_BUFFER_RX);
288        }
289    }
290}
w5500/socket.rs

w5500/
socket.rs
