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vyre-intrinsics
Category-C hardware intrinsics for vyre — the ops that cannot be
written as fn(...) -> Program compositions over existing Expr /
Node primitives because they require dedicated backend emitter arms
and dedicated vyre-reference evaluation arms.
If an op can be expressed purely as composition of existing
primitives, it belongs in vyre-libs or a consumer crate, NOT here.
The split is documented in docs/migration-vyre-ops-to-intrinsics.md.
Invariants
- Every intrinsic has a CPU reference. Each op here implements
CpuOp/CategoryAOpfromvyre-foundation::cpu_op; the conform runner diffs every backend dispatch against that reference byte-for-byte. - Every intrinsic has a dedicated Naga emitter arm. There is no
fallback-to-composition path — if the backend can't emit it, the
program fails validation up front with a
Fix:hint. - Every intrinsic has an
IntrinsicDescriptorin the inventory registry.inventory::submit!wires the descriptor at link time so the harness, spec tooling, and wire decoders discover it automatically. - Composite builders do not belong here. A
fnthat returns aProgramby composing existing IR variants lives invyre-libs(shared) or the caller's own crate.vyre-intrinsicsis strictly Category-C: hardware-bound ops. - Feature flags are additive.
hardwareandsubgroup-opsare on by default. Enabling a feature never removes or changes the signature of an already-enabled intrinsic. - Region chains wrap every composition. The
regionmodule is the mandatory wrap helper every tier uses; consumers of this crate get it re-exported so they don't hand-roll it.
Boundaries
vyre-intrinsics owns:
subgroup_add,subgroup_ballot,subgroup_shuffle— wave-level collectives backed by Naga 25+ subgroup lowering.workgroup_barrier,storage_barrier— concurrency fences.bit_reverse_u32,popcount_u32— bit intrinsics mapping 1:1 to hardware (reverseBits,countOneBits).fma_f32— fused multiply-add, byte-identical tof32::mul_add.inverse_sqrt_f32— hardwareinverseSqrt()via naga.
vyre-intrinsics does NOT own:
- Composite builders (atomics, lzcnt/tzcnt, clamp, hashes). Those
moved to
vyre-libsin Migration 2–3 and live there now. - Register allocation, backend dispatch, or pipeline caching —
that's
vyre-driver+ the backend crates. - IR schema or validation — those live in
vyre-foundation.
Three worked examples
1. Use a bit intrinsic in a compute kernel
use ;
use wrap;
2. Use subgroup ops
[]
= "0.6"
Then in code:
use subgroup_ballot;
The default feature set includes subgroup-ops; a backend that cannot
lower subgroup collectives rejects the program during validation.
3. CPU-reference dispatch for a custom intrinsic test
use ;
use fma_f32;
let expected = ;
assert_eq!;
Extension guide — adding a Category-C intrinsic
- Verify the op cannot be expressed as a composition of existing
Exprvariants. If it can, write afn() -> Programhelper invyre-libsinstead. Category-C is a narrow door; ~9 ops total. - Add a submodule under
hardware/(or another feature-gated module). Implement:- The builder function returning
Program/Expr. - The
CpuOp/CategoryAOpimplementation for bit-identical reference evaluation. - The dedicated emitter arm in the concrete driver that owns the target lowering.
- The builder function returning
- Register with
inventory::submit!(IntrinsicDescriptor { ... })— the harness discovers you automatically. - Declare algebraic laws (
AlgebraicLaw) if your op has any; the conform harness re-derives them at every CI run and rejects implementations that break them. - Add a conform fixture under
conform/vyre-conform-runner/fixturesso every backend is diffed against your CPU reference from day one. - Document the op in
docs/migration-vyre-ops-to-intrinsics.mdso the classification rule stays authoritative.
See hardware/popcount.rs for the minimal template and
hardware/subgroup_ballot/subgroup_ballot.rs for the subgroup pattern.