Expand description
Attributes defined in NI-VISA product doc with NI-VISA specific attributes removed
auto fetched from NI-VISA doc web api and processed by macros
sample of expanded codes
#[repr(u32)]
pub enum AttrKind {
Attr4882Compliant = 0x3FFF019F as _,
}
#[derive(Debug, Clone, PartialEq, PartialOrd, Eq, Ord, Hash)]
pub enum Attribute {
///VI_ATTR_4882_COMPLIANT specifies whether the device is 488.2 compliant.
Attr4882Compliant(Attr4882Compliant),
}
impl Attribute {
pub(crate) unsafe fn from_kind(kind: AttrKind) -> Self {
match kind {
AttrKind::Attr4882Compliant => Self::from(Attr4882Compliant::zero()),
}
}
pub(crate) fn mut_c_void(&mut self) -> *mut ::std::ffi::c_void {
match self {
Self::Attr4882Compliant(s) => s.mut_c_void(),
}
}
pub fn kind(&self) -> AttrKind {
match self {
Self::Attr4882Compliant(s) => AttrInner::kind(s),
}
}
pub(crate) fn as_u64(&self) -> u64 {
match self {
Self::Attr4882Compliant(s) => s.value as _,
}
}
}
///VI_ATTR_4882_COMPLIANT specifies whether the device is 488.2 compliant.
#[derive(Debug, Clone, PartialEq, PartialOrd, Eq, Ord, Hash)]
pub struct Attr4882Compliant {
value: vs::ViBoolean,
}
impl Attr4882Compliant {
pub fn into_inner(self) -> vs::ViBoolean {
self.value
}
}
impl Attr4882Compliant {
pub const VI_TRUE: Self = Self { value: 1 as _ };
pub const VI_FALSE: Self = Self { value: 0 as _ };
pub unsafe fn new_unchecked(value: vs::ViBoolean) -> Self {
Self { value }
}
#[allow(unused_parens)]
pub fn new_checked(value: vs::ViBoolean) -> Option<Self> {
if 1 as vs::ViBoolean == value || 0 as vs::ViBoolean == value {
Some(Self { value })
} else {
None
}
}
}
impl AttrInner for Attr4882Compliant {
const KIND: AttrKind = AttrKind::Attr4882Compliant;
unsafe fn zero() -> Self {
Self { value: 0 as _ }
}
fn mut_c_void(&mut self) -> *mut ::std::ffi::c_void {
&mut self.value as *mut _ as _
}
}
impl From<Attr4882Compliant> for Attribute {
fn from(s: Attr4882Compliant) -> Self {
Self::Attr4882Compliant(s)
}
}TODO: ViString should be replaced by CString
Structs
VI_ATTR_4882_COMPLIANT specifies whether the device is 488.2 compliant.
VI_ATTR_ASRL_AVAIL_NUM shows the number of bytes available in the low-level I/O receive buffer.
VI_ATTR_ASRL_BAUD is the baud rate of the interface. It is represented as an unsigned 32-bit integer so that any baud rate can be used, but it usually requires a commonly used rate such as 300, 1200, 2400, or 9600 baud.
VI_ATTR_ASRL_CTS_STATE shows the current state of the Clear To Send (CTS) input signal.
VI_ATTR_ASRL_DATA_BITS is the number of data bits contained in each frame (from 5 to 8). The data bits for each frame are located in the low-order bits of every byte stored in memory.
VI_ATTR_ASRL_DCD_STATE represents the current state of the Data Carrier Detect (DCD) input signal. The DCD signal is often used by modems to indicate the detection of a carrier (remote modem) on the telephone line. The DCD signal is also known as Receive Line Signal Detect (RLSD). This attribute is Read Only except when the VI_ATTR_ASRL_WIRE_MODE attribute is set to VI_ASRL_WIRE_232_DCE , or VI_ASRL_WIRE_232_AUTO with the hardware currently in the DCE state.
VI_ATTR_ASRL_DSR_STATE shows the current state of the Data Set Ready (DSR) input signal.
VI_ATTR_ASRL_DTR_STATE shows the current state of the Data Terminal Ready (DTR) input signal. When the VI_ATTR_ASRL_FLOW_CNTRL attribute is set to VI_ASRL_FLOW_DTR_DSR , this attribute is Read Only. Querying the value will return VI_STATE_UNKNOWN .
VI_ATTR_ASRL_END_IN indicates the method used to terminate read operations. Because the default value of VI_ATTR_TERMCHAR VI_ATTR_ASRL_END_IN or VI_ATTR_TERMCHAR .
VI_ATTR_ASRL_END_OUT indicates the method used to terminate write operations.
VI_ATTR_ASRL_FLOW_CNTRL indicates the type of flow control used by the transfer mechanism. This attribute can specify multiple flow control mechanisms by bit-ORing multiple values together. However, certain combinations may not be supported by all serial ports and/or operating systems.
VI_ATTR_ASRL_PARITY is the parity used with every frame transmitted and received.
VI_ATTR_ASRL_REPLACE_CHAR specifies the character to be used to replace incoming characters that arrive with errors (such as parity error).
VI_ATTR_ASRL_RI_STATE represents the current state of the Ring Indicator (RI) input signal. The RI signal is often used by modems to indicate that the telephone line is ringing. This attribute is Read Only except when the VI_ATTR_ASRL_WIRE_MODE attribute is set to VI_ASRL_WIRE_232_DCE , or VI_ASRL_WIRE_232_AUTO with the hardware currently in the DCE state.
VI_ATTR_ASRL_RTS_STATE is used to manually assert or unassert the Request To Send (RTS) output signal. When the VI_ATTR_ASRL_FLOW_CNTRL attribute is set to VI_ASRL_FLOW_RTS_CTS , this attribute is Read Only. Querying the value will return VI_STATE_UNKNOWN .
VI_ATTR_ASRL_STOP_BITS is the number of stop bits used to indicate the end of a frame. The value VI_ASRL_STOP_ONE5 indicates one-and-one-half (1.5) stop bits.
VI_ATTR_ASRL_XOFF_CHAR specifies the value of the XOFF character used for XON/XOFF flow control (both directions). If XON/XOFF flow control (software handshaking) is not being used, the value of this attribute is ignored.
VI_ATTR_ASRL_XON_CHAR specifies the value of the XON character used for XON/XOFF flow control (both directions). If XON/XOFF flow control (software handshaking) is not being used, the value of this attribute is ignored.
VI_ATTR_BUFFER contains the address of a buffer that was used in an asynchronous operation.
VI_ATTR_CMDR_LA is the unique logical address of the commander of the VXI device used by the given session.
VI_ATTR_DEST_ACCESS_PRIV specifies the address modifier to be used in high-level access operations, such as viOut XX () and viMoveOut XX () , when writing to the destination.
VI_ATTR_DEST_BYTE_ORDER specifies the byte order to be used in high-level access operations, such as viOut XX () and viMoveOut XX () , when writing to the destination.
VI_ATTR_DEST_INCREMENT is used in the viMoveOut XX () operations to specify by how many elements the destination offset is to be incremented after every transfer. The default value of this attribute is 1 (that is, the destination address will be incremented by 1 after each transfer), and the viMoveOut XX () operations move into consecutive elements. If this attribute is set to 0, the viMoveOut XX () operations will always write to the same element, essentially treating the destination as a FIFO register.
This attribute specifies the 488-style status byte of the local controller or device associated with this session. If this attribute is written and bit 6 (40h) is set, this device or controller will assert a service request (SRQ) if it is defined for this interface.
This attribute specifies whether I/O accesses should use DMA ( VI_TRUE ) or Programmed I/O ( VI_FALSE ). In some implementations, this attribute may have global effects even though it is documented to be a local attribute. Since this affects performance and not functionality, that behavior is acceptable.
VI_ATTR_EVENT_TYPE is the unique logical identifier for the event type of the specified event.
VI_ATTR_FDC_CHNL determines which Fast Data Channel (FDC) will be used to transfer the buffer.
VI_ATTR_FDC_MODE specifies which Fast Data Channel (FDC) mode to use (either normal or stream mode).
Setting VI_ATTR_FDC_USE_PAIR to VI_TRUE specifies to use a channel pair for transferring data. Otherwise, only one channel will be used.
This attribute specifies whether viReadToFile() will overwrite (truncate) or append when opening a file.
This attribute shows whether the specified GPIB interface is currently addressed to talk or listen, or is not addressed.
This attribute shows the current state of the GPIB ATN (ATtentioN) interface line.
This attribute shows whether the specified GPIB interface is currently CIC (Controller In Charge).
This attribute specifies the total number of meters of GPIB cable used in the specified GPIB interface.
This attribute shows the current state of the GPIB NDAC (Not Data ACcepted) interface line.
VI_ATTR_GPIB_PRIMARY_ADDR specifies the primary address of the GPIB device used by the given session. For the GPIB INTFC Resource, this attribute is Read-Write.
VI_ATTR_GPIB_READDR_EN specifies whether to use repeat addressing before each read or write operation.
This attribute specifies whether the local controller has gained or lost CIC status.
VI_ATTR_GPIB_REN_STATE returns the current state of the GPIB REN (Remote ENable) interface line.
VI_ATTR_GPIB_SECONDARY_ADDR specifies the secondary address of the GPIB device used by the given session. For the GPIB INTFC Resource, this attribute is Read-Write.
This attribute shows the current state of the GPIB SRQ (Service ReQuest) interface line.
This attribute shows whether the specified GPIB interface is currently the system controller. In some implementations, this attribute may be modified only through a configuration utility. On these systems this attribute is read-only (RO).
VI_ATTR_GPIB_UNADDR_EN specifies whether to unaddress the device (UNT and UNL) after each read or write operation.
VI_ATTR_IMMEDIATE_SERV specifies whether the device associated with this session is an immediate servant of the controller running VISA.
VI_ATTR_INTF_INST_NAME specifies human-readable text that describes the given interface.
VI_ATTR_INTF_NUM specifies the board number for the given interface.
VI_ATTR_INTF_TYPE specifies the interface type of the given session.
VI_ATTR_INTR_STATUS_ID specifies the 32-bit status/ID retrieved during the IACK cycle.
VI_ATTR_IO_PROT specifies which protocol to use. In VXI, you can choose normal word serial or fast data channel (FDC). In GPIB, you can choose normal or high-speed (HS-488) transfers. In serial, TCPIP, or USB RAW, you can choose normal transfers or 488.2-defined strings. In USB INSTR, you can choose normal or vendor-specific transfers. In previous versions of VISA, VI_PROT_NORMAL was known as VI_NORMAL , VI_PROT_FDC was known as VI_FDC , VI_PROT_HS488 was known as VI_HS488 , and VI_PROT_4882_STRS was known as VI_ASRL488 .
VI_ATTR_JOB_ID contains the job ID of the asynchronous operation that has completed.
VI_ATTR_MA.infRAME_LA specifies the lowest logical address in the mainframe. If the logical address is not known, VI_UNKNOWN_LA is returned.
VI_ATTR_MANF_ID is the manufacturer identification number of the device. For VXI resources, this refers to the VXI Manufacturer ID. For PXI INSTR resources, if the subsystem PCI Vendor ID is nonzero, this refers to the subsystem Vendor ID. Otherwise, this refers to the Vendor ID. For USB resources, this refers to the Vendor ID (VID).
This string attribute is the manufacturer name.
VI_ATTR_MAX_QUEUE_LENGTH specifies the maximum number of events that can be queued at any time on the given session. Events that occur after the queue has become full will be discarded. VI_ATTR_MAX_QUEUE_LENGTH is a Read/Write attribute until the first time viEnableEvent() is called on a session. Thereafter, this attribute is Read Only.
VI_ATTR_MEM_BASE , VI_ATTR_MEM_BASE_32 , and VI_ATTR_MEM_BASE_64 specify the base address of the device in VXIbus memory address space. This base address is applicable to A24 or A32 address space. If the value of VI_ATTR_MEM_SPACE is VI_A16_SPACE , the value of this attribute is meaningless for the given VXI device.
VI_ATTR_MEM_BASE , VI_ATTR_MEM_BASE_32 , and VI_ATTR_MEM_BASE_64 specify the base address of the device in VXIbus memory address space. This base address is applicable to A24 or A32 address space. If the value of VI_ATTR_MEM_SPACE is VI_A16_SPACE , the value of this attribute is meaningless for the given VXI device.
VI_ATTR_MEM_BASE , VI_ATTR_MEM_BASE_32 , and VI_ATTR_MEM_BASE_64 specify the base address of the device in VXIbus memory address space. This base address is applicable to A24 or A32 address space. If the value of VI_ATTR_MEM_SPACE is VI_A16_SPACE , the value of this attribute is meaningless for the given VXI device.
VI_ATTR_MEM_SIZE , VI_ATTR_MEM_SIZE_32 , and VI_ATTR_MEM_SIZE_64 specify the size of memory requested by the device in VXIbus address space. If the value of VI_ATTR_MEM_SPACE is VI_A16_SPACE , the value of this attribute is meaningless for the given VXI device.
VI_ATTR_MEM_SIZE , VI_ATTR_MEM_SIZE_32 , and VI_ATTR_MEM_SIZE_64 specify the size of memory requested by the device in VXIbus address space. If the value of VI_ATTR_MEM_SPACE is VI_A16_SPACE , the value of this attribute is meaningless for the given VXI device.
VI_ATTR_MEM_SIZE , VI_ATTR_MEM_SIZE_32 , and VI_ATTR_MEM_SIZE_64 specify the size of memory requested by the device in VXIbus address space. If the value of VI_ATTR_MEM_SPACE is VI_A16_SPACE , the value of this attribute is meaningless for the given VXI device.
VI_ATTR_MEM_SPACE specifies the VXIbus address space used by the device. The three types are A16, A24, or A32 memory address space. A VXI device with memory in A24 or A32 space also has registers accessible in the configuration section of A16 space. A VME device with memory in multiple address spaces requires one VISA resource for each address space used.
VI_ATTR_MODEL_CODE specifies the model code for the device. For VXI resources, this refers to the VXI Model Code. For PXI INSTR resources, if the subsystem PCI Vendor ID is nonzero, this refers to the subsystem Device ID. Otherwise, this refers to the Device ID. For USB resources, this refers to the Product ID (PID).
This string attribute is the model name of the device.
VI_ATTR_OPER_NAME contains the name of the operation generating this event.
VI_ATTR_PXI_ACTUAL_LWIDTH specifies the PCI Express link width negotiated between the PCI Express host controller and the device. A value of -1 indicates that the device is not a PXI/PCI Express device.
VI_AT TR_PXI_BUS_NUM specifies the PCI bus number of this device.
VI_ATTR_PXI_CHASSIS specifies the PXI chassis number of this device. A value of -1 means the chassis number is unknown.
VI_ATTR_PXI_DEST_TRIG_BUS specifies the segment to use to qualify trigDest in viMapTrigger . * You can determine the number of segments from MAX (in the trigger reservation panel), from the chassis documentation, and by looking at the dividing lines on the physical front panel of the chassis itself. Range: Single-Segment Chassis (8 Slots or Less): N/A, Multisegment Chassis (More than 8 Slots): 1…number of chassis segments
This is the PXI device number.
VI_ATTR_PXI_DSTAR_BUS specifies the differential star bus number of this device. A value of -1 means the chassis is unidentified or does not have a timing slot.
VI_ATTR_PXI_DSTAR_SET specifies the set of PXIe DStar lines connected to the slot this device is in. Each slot can be connected to a set of DStar lines, and each set has a number. For example, one slot could be connected to the DStar set 2, while the next one could be connected to the DStar set 4. The VI_ATTR_PXI_DSTAR_SET value does not represent individual line numbers; instead, it represents the number of the set itself. A PXIe DStar set consists of the numbered differential pairs PXIe-DSTARA, PXIe-DSTARB, and PXIe-DSTARC routed from the PXIe system timing slot. For example, if VI_ATTR_PXI_DSTAR_SET is 4, the slot the device is in is connected to PXIe-DStarA_4, PXIe-DStarB_4, and PXIe-DStarC_4. A value of -1 means the chassis is unidentified or the slot the device is in does not have a DStar set connected to it. Also, although a PXIe slot has a DStar connection, the device in that slot may not. In that case, the value of VI_ATTR_PXI_DSTAR_SET still will be the set connected to the slot the device is in.
This is the PCI function number of the PXI/PCI resource. For most devices, the function number is 0, but a multifunction device may have a function number up to 7. The meaning of a function number other than 0 is device specific.
VI_ATTR_PXI_IS_EXPRESS specifies whether the device is PXI/PCI or PXI/PCI Express.
VI_ATTR_PXI_MAX_LWIDTH specifies the maximum PCI Express link width of the device. A value of -1 indicates that the device is not a PXI/PCI Express device.
PXI memory base address assigned to the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
PXI memory base address assigned to the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
PXI memory base address assigned to the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
PXI memory base address assigned to the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
PXI memory base address assigned to the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
PXI memory base address assigned to the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
Memory size used by the device in the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
Memory size used by the device in the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
Memory size used by the device in the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
Memory size used by the device in the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
Memory size used by the device in the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
Memory size used by the device in the specified BAR. If the value of the corresponding VI_ATTR_PXI_MEM_TYPE_BAR x is VI_PXI_ADDR_NONE , the value of this attribute is undefined for the given PXI device.
Memory type used by the device in the specified BAR (if applicable).
Memory type used by the device in the specified BAR (if applicable).
Memory type used by the device in the specified BAR (if applicable).
Memory type used by the device in the specified BAR (if applicable).
Memory type used by the device in the specified BAR (if applicable).
Memory type used by the device in the specified BAR (if applicable).
VI_ATTR_PXI_RECV_INTR_DATA shows the first PXI/PCI register that was read in the successful interrupt detection sequence.
VI_ATTR_PXI_RECV_INTR_SEQ shows the index of the interrupt sequence that detected the interrupt condition.
VI_ATTR_PXI_SLOT_LBUS_LEFT specifies the slot number or special feature connected to the local bus left lines of this device.
VI_ATTR_PXI_SLOT_LBUS_RIGHT specifies the slot number or special feature connected to the local bus right lines of this device.
VI_ATTR_PXI_SLOT_LWIDTH specifies the PCI Express link width of the PXI Express peripheral slot in which the device resides. A value of -1 indicates that the device is not a PXI Express device.
VI_ATTR_PXI_SLOTPATH specifies the slot path of this device. The purpose of a PXI slot path is to describe the PCI bus hierarchy in a manner independent of the PCI bus number. PXI slot paths are a sequence of values representing the PCI device number and function number of a PCI module and each parent PCI bridge that routes the module to the host PCI bridge (bus 0). Each value is represented as “ dev[.func] “, where the function number is listed only if it is non-zero. When a PXI slot path includes multiple values, the values are comma-separated. The string format of the attribute value looks like this: device1[.function1][,device2[.function2]][,…] An example string is “ 5.1,12,8 “. In this case, there is a PCI-to-PCI bridge on device 8 on the root bus. On its secondary bus, there is another PCI-to-PCI bridge on device 12. On its secondary bus, there is an instrument on device 5, function 1. The example string value describes this instrument’s slot path.
VI_ATTR_PXI_SRC_TRIG_BUS specifies the segment to use to qualify trigSrc in viMapTrigger . * You can determine the number of segments from MAX (in the trigger reservation panel), from the chassis documentation, and by looking at the dividing lines on the physical front panel of the chassis itself. Range: Single-Segment Chassis (8 Slots or Less): N/A Multisegment Chassis (More than 8 Slots): 1…number of chassis segments
VI_ATTR_PXI_STAR_TRIG_BUS specifies the star trigger bus number of this device.
V I_ATTR_PXI_STAR_TRIG_LINE specifies the PXI_STAR line connected to this device.
VI_ATTR_PXI_TRIG_BUS specifies the trigger bus number of this device.
VI_ATTR_RD_BUF_OPER_MODE specifies the operational mode of the formatted I/O read buffer. When the operational mode is set to VI_FLUSH_DISABLE (default), the buffer is flushed only on explicit calls to viFlush() . If the operational mode is set to VI_FLUSH_ON_ACCESS , the read buffer is flushed every time a viScanf() (or related) operation completes.
This is the current size of the formatted I/O input buffer for this session. The user can modify this value by calling viSetBuf() .
VI_ATTR_RECV_INTR_LEVEL is the VXI interrupt level on which the interrupt was received.
VI_ATTR_RECV_TRIG_ID identifies the triggering mechanism on which the specified trigger event was received.
VI_ATTR_RET_COUNT , VI_ATTR_RET_COUNT_32 , and VI_ATTR_RET_COUNT_64 contain the actual number of elements that were asynchronously transferred. VI_ATTR_RET_COUNT_32 is always a 32-bit value. VI_ATTR_RET_COUNT_64 is always a 64-bit value. VI_ATTR_RET_COUNT_64 is not supported with 32-bit applications. VI_ATTR_RET_COUNT is a 32-bit value for 32-bit applications and a 64-bit value for 64-bit applications.
VI_ATTR_RET_COUNT , VI_ATTR_RET_COUNT_32 , and VI_ATTR_RET_COUNT_64 contain the actual number of elements that were asynchronously transferred. VI_ATTR_RET_COUNT_32 is always a 32-bit value. VI_ATTR_RET_COUNT_64 is always a 64-bit value. VI_ATTR_RET_COUNT_64 is not supported with 32-bit applications. VI_ATTR_RET_COUNT is a 32-bit value for 32-bit applications and a 64-bit value for 64-bit applications.
VI_ATTR_RET_COUNT , VI_ATTR_RET_COUNT_32 , and VI_ATTR_RET_COUNT_64 contain the actual number of elements that were asynchronously transferred. VI_ATTR_RET_COUNT_32 is always a 32-bit value. VI_ATTR_RET_COUNT_64 is always a 64-bit value. VI_ATTR_RET_COUNT_64 is not supported with 32-bit applications. VI_ATTR_RET_COUNT is a 32-bit value for 32-bit applications and a 64-bit value for 64-bit applications.
VI_ATTR_RM_SESSION specifies the session of the Resource Manager that was used to open this session.
VI_ATTR_RSRC_CLASS specifies the resource class (for example, “INSTR”) as defined by the canonical resource name.
VI_ATTR_RSRC_IMPL_VERSION is the resource version that uniquely identifies each of the different revisions or implementations of a resource. This attribute value is defined by the individual manufacturer and increments with each new revision. The format of the value has the upper 12 bits as the major number of the version, the next lower 12 bits as the minor number of the version, and the lowest 8 bits as the sub-minor number of the version.
VI_ATTR_RSRC_LOCK_STATE indicates the current locking state of the resource. The resource can be unlocked, locked with an exclusive lock, or locked with a shared lock.
VI_ATTR_RSRC_MANF_ID is a value that corresponds to the VXI manufacturer ID of the vendor that implemented the VISA library. This attribute is not related to the device manufacturer attributes.
VI_ATTR_RSRC_MANF_NAME is a string that corresponds to the manufacturer name of the vendor that implemented the VISA library. This attribute is not related to the device manufacturer attributes.
VI_ATTR_RSRC_NAME is the unique identifier for a resource. Refer to VISA Resource Syntax and Examples for the syntax of resource strings and examples.
VI_ATTR_RSRC_SPEC_VERSION is the resource version that uniquely identifies the version of the VISA specification to which the implementation is compliant. The format of the value has the upper 12 bits as the major number of the version, the next lower 12 bits as the minor number of the version, and the lowest 8 bits as the sub-minor number of the version. The current VISA specification defines the value to be 00300000h.
VI_ATTR_SEND_END_EN specifies whether to assert END during the transfer of the last byte of the buffer. VI_ATTR_SEND_END_EN is relevant only in viWrite and related operations. On Serial INSTR sessions, if this attribute is set to VI_FALSE, the write will transmit the exact contents of the user buffer, without modifying it and without appending anything to the data being written. If this attribute is set to VI_TRUE, VISA will perform the behavior described in VI_ATTR_ASRL_END_OUT . On GPIB, VXI, TCP/IP INSTR, and USB INSTR sessions, if this attribute is set to VI_TRUE, VISA will include the 488.2 defined “end of message” terminator.
VI_ATTR_SIGP_STATUS_ID is the 16-bit Status/ID value retrieved during the IACK cycle or from the Signal register.
VI_ATTR_SLOT specifies the physical slot location of the device. If the slot number is not known, VI_UNKNOWN_SLOT is returned.
VI_ATTR_SRC_ACCESS_PRIV specifies the address modifier to be used in high-level access operations, such as viIn XX () and viMoveIn XX () , when reading from the source.
VI_ATTR_SRC_BYTE_ORDER specifies the byte order to be used in high-level access operations, such as viIn XX () and viMoveIn XX () , when reading from the source.
VI_ATTR_SRC_INCREMENT is used in the viMoveIn XX () operations to specify by how many elements the source offset is to be incremented after every transfer. The default value of this attribute is 1 (that is, the source address will be incremented by 1 after each transfer), and the viMoveIn XX () operations move from consecutive elements. If this attribute is set to 0, the viMoveIn XX () operations will always read from the same element, essentially treating the source as a FIFO register.
VI_ATTR_STATUS contains the return code of the operation generating this event.
VI_ATTR_SUPPRESS_END_EN is relevant only in viRead and related operations. For all session types on which this attribute is supported, if this attribute is set to VI_TRUE, read will not terminate due to an END condition. However, a read may still terminate successfully if VI_ATTR_TERMCHAR_EN is set to VI_TRUE. Otherwise, read will not terminate until all requested data is received (or an error occurs). On Serial INSTR sessions, if this attribute is set to VI_FALSE, VISA will perform the behavior described in VI_ATTR_ASRL_END_IN . On USB RAW sessions, if this attribute is set to VI_FALSE, VISA will perform the behavior described in VI_ATTR_USB_END_IN . On TCP/IP SOCKET sessions, if this attribute is set to VI_FALSE, if NI-VISA reads some data and then detects a pause in the arrival of data packets, it will terminate the read operation. On TCP/IP SOCKET sessions, this attribute defaults to VI_TRUE in NI-VISA. On VXI INSTR sessions, if this attribute is set to VI_FALSE, the END bit terminates read operations.
This is the TCPIP address of the device to which the session is connected. This string is formatted in dot notation.
This specifies the LAN device name used by the VXI-11 or LXI protocol during connection.
This specifies the host name of the device. If no host name is available, this attribute returns an empty string.
Setting this attribute to TRUE requests that a TCP/IP provider enable the use of keep-alive packets on TCP connections. After the system detects that a connection was dropped, VISA returns a lost connection error code on subsequent I/O calls on the session. The time required for the system to detect that the connection was dropped is dependent on the system and is not settable.
The Nagle algorithm is disabled when this attribute is enabled (and vice versa). The Nagle algorithm improves network performance by buffering “send” data until a full-size packet can be sent. This attribute is enabled by default in VISA to verify that synchronous writes get flushed immediately.
This specifies the port number for a given TCPIP address. For a TCPIP SOCKET Resource, this is a required part of the address string.
VI_ATTR_TERMCHAR is the termination character. When the termination character is read and VI_ATTR_TERMCHAR_EN is enabled during a read operation, the read operation terminates. For a Serial INSTR session, VI_ATTR_TERMCHAR is Read/Write when the corresponding session is not enabled to receive VI_EVENT_ASRL_TERMCHAR events. When the session is enabled to receive VI_EVENT_ASRL_TERMCHAR events, the attribute VI_ATTR_TERMCHAR is Read Only. For all other session types, the attribute VI_ATTR_TERMCHAR is always Read/Write.
VI_ATTR_TERMCHAR_EN is a flag that determines whether the read operation should terminate when a termination character is received. This attribute is ignored if VI_ATTR_ASRL_END_IN is set to VI_ASRL_END_TERMCHAR. This attribute is valid for both raw I/O (viRead) and formatted I/O (viScanf).
VI_ATTR_TMO_VALUE specifies the minimum timeout value to use (in milliseconds) when accessing the device associated with the given session. A timeout value of VI_TMO_IMMEDIATE means that operations should never wait for the device to respond. A timeout value of VI_TMO_INFINITE disables the timeout mechanism. Notice that the actual timeout value used by the driver may be higher than the requested one. The actual timeout value is returned when this attribute is retrieved via viGetAttribute() .
VI_ATTR_TRIG_ID is the identifier for the current triggering mechanism. VI_ATTR_TRIG_ID is Read/Write when the corresponding session is not enabled to receive trigger events. When the session is enabled to receive trigger events, the attribute VI_ATTR_TRIG_ID is Read Only.
VI_ATTR_USB_INTFC_NUM specifies the USB interface number used by the given session.
VI_ATTR_USB_MAX_INTR_SIZE specifies the maximum size of data that will be stored by any given USB interrupt. If a USB interrupt contains more data than this size, the data in excess of this size will be lost. VI_ATTR_USB_MAX_INTR_SIZE is Read/Write when the corresponding session is not enabled to receive USB interrupt events. When the session is enabled to receive USB interrupt events, the attribute VI_ATTR_USB_MAX_INTR_SIZE is Read Only.
VI_ATTR_USB_PROTOCOL specifies the USB protocol used by this USB interface.
VI_ATTR_USB_RECV_INTR_DATA contains the actual received data from the USB Interrupt. The passed in data buffer must be of size at least equal to the value of VI_ATTR_USB_RE CV_INTR_SIZE .
VI_ATTR_USB_RECV_INTR_SIZE contains the number of bytes of USB interrupt data that is stored.
VI_ATTR_USB_SERIAL_NUM specifies the USB serial number of this device.
VI_ATTR_USER_DATA , VI_ATTR_USER_DATA_32 , and VI_ATTR_USER_DATA_64 store data to be used privately by the application for a particular session. VISA does not use this data for any purpose. It is provided to the application for its own use. VI_ATTR_USER_DATA_64 is not supported with 32-bit applications.
VI_ATTR_USER_DATA , VI_ATTR_USER_DATA_32 , and VI_ATTR_USER_DATA_64 store data to be used privately by the application for a particular session. VISA does not use this data for any purpose. It is provided to the application for its own use. VI_ATTR_USER_DATA_64 is not supported with 32-bit applications.
VI_ATTR_USER_DATA , VI_ATTR_USER_DATA_32 , and VI_ATTR_USER_DATA_64 store data to be used privately by the application for a particular session. VISA does not use this data for any purpose. It is provided to the application for its own use. VI_ATTR_USER_DATA_64 is not supported with 32-bit applications.
This attribute represents the VXI-defined device class to which the resource belongs, either message based ( VI_VXI_CLASS_MESSAGE ), register based ( VI_VXI_CLASS_REGISTER ), extended ( VI_VXI_CLASS_EXTENDED ), or memory ( VI_VXI_CLASS_MEMORY ). VME devices are usually either register based or belong to a miscellaneous class ( VI_VXI_CLASS_OTHER ).
For an INSTR session, VI_ATTR_VXI_LA specifies the logical address of the VXI or VME device used by the given session. For a MEMACC or SERVANT session, this attribute specifies the logical address of the local controller.
This attribute shows the current state of the VXI trigger lines. This is a bit vector with bits 0-9 corresponding to VI_TRIG_TTL0 through VI_TRIG_ECL1 .
This attribute shows which VXI trigger lines this implementation supports. This is a bit vector with bits 0-9 corresponding to VI_TRIG_TTL0 through VI_TRIG_ECL1 .
This attribute shows the current state of the VXI/VME interrupt lines. This is a bit vector with bits 0-6 corresponding to interrupt lines 1-7.
This attribute shows the current state of the VXI/VME SYSFAIL (SYStem FAILure) backplane line.
VI_ATTR_WIN_ACCESS specifies the modes in which the current window may be accessed.
VI_ATTR_WIN_ACCESS_PRIV specifies the address modifier to be used in low-level access operations, such as viMapAddress() , viPeek XX () , and viPoke XX () , when accessing the mapped window. This attribute is Read/Write when the corresponding session is not mapped (that is, when VI_ATTR_WIN_ACCESS is VI_NMAPPED . When the session is mapped, this attribute is Read Only.
VI_ATTR_WIN_BASE_ADDR , VI_ATTR_WIN_BASE_ADDR_32 , and VI_ATTR_WIN_BASE_ADDR_64 specify the base address of the interface bus to which this window is mapped. If the value of VI_ATTR_WIN_ACCESS is VI_NMAPPED , the value of this attribute is undefined.
VI_ATTR_WIN_BASE_ADDR , VI_ATTR_WIN_BASE_ADDR_32 , and VI_ATTR_WIN_BASE_ADDR_64 specify the base address of the interface bus to which this window is mapped. If the value of VI_ATTR_WIN_ACCESS is VI_NMAPPED , the value of this attribute is undefined.
VI_ATTR_WIN_BASE_ADDR , VI_ATTR_WIN_BASE_ADDR_32 , and VI_ATTR_WIN_BASE_ADDR_64 specify the base address of the interface bus to which this window is mapped. If the value of VI_ATTR_WIN_ACCESS is VI_NMAPPED , the value of this attribute is undefined.
VI_ATTR_WIN_BYTE_ORDER specifies the byte order to be used in low-level access operations, such as viMapAddress() , viPeek XX () , and viPoke XX () , when accessing the mapped window. This attribute is Read/Write when the corresponding session is not mapped (that is, when VI_ATTR_WIN_ACCESS is VI_NMAPPED . When the session is mapped, this attribute is Read Only.
VI_ATTR_WIN_SIZE , VI_ATTR_WIN_SIZE_32 , and VI_ATTR_WIN_SIZE_64 specify the size of the region mapped to this window. If the value of VI_ATTR_WIN_ACCESS is VI_NMAPPED , the value of this attribute is undefined.
VI_ATTR_WIN_SIZE , VI_ATTR_WIN_SIZE_32 , and VI_ATTR_WIN_SIZE_64 specify the size of the region mapped to this window. If the value of VI_ATTR_WIN_ACCESS is VI_NMAPPED , the value of this attribute is undefined.
VI_ATTR_WIN_SIZE , VI_ATTR_WIN_SIZE_32 , and VI_ATTR_WIN_SIZE_64 specify the size of the region mapped to this window. If the value of VI_ATTR_WIN_ACCESS is VI_NMAPPED , the value of this attribute is undefined.
VI_ATTR_WR_BUF_OPER_MODE specifies the operational mode of the formatted I/O write buffer. When the operational mode is set to VI_FLUSH_WHEN_FULL (default), the buffer is flushed when an END indicator is written to the buffer, or when the buffer fills up. If the operational mode is set to VI_FLUSH_ON_ACCESS , the write buffer is flushed under the same conditions, and also every time a viPrintf() (or related) operation completes.
This is the current size of the formatted I/O output buffer for this session. The user can modify this value by calling viSetBuf() .