Struct virt_ic::chip::cpu::SimpleCPU

pub struct SimpleCPU { /* fields omitted */ }

A simple example CPU

• 4M of address space (12 ADDR pins)
• 8-bit IO Pins
• 3 data register (Accumulator, B and C)
• 2 address registers (H and L forming the full address HL)

Instructions

On startup or RESET, the CPU will fetch the boot address at 0xFFD and 0xFFE.
The Addresses are stored in this order : MSD, LSD, so 0x0F and 0x12 will create address 0xF12.

The stack pointer will be initialized in the bank specified at 0xFFF.
If 0xFFF contains 0x0E, the CPU will use 0x0E00 to 0x0EFF for his stack.
Note that the bank can't go beyond 0x0F since the CPU only has a 12-bit address space.

TODO: Implement IRQ
On IRQ, the CPU will fetch the Interrupt code address at 0xFFB and 0xFFC.
When IRQ is triggered, the Address at 0xFFC and 0xFFD will be used as a JSR opcode.
To return to the main code, you'll just need to execute a RTN opcode.

Opcodes

MSD\LSD	x0	x1	x2	x3	x4	x5	x6	x7	x8	x9	xA	xB	xC	xD	xE	xF
0x	HLT	INA	DEA	INL	DEL	CLC	ADB	ADC	TAB	TBA	TAC	TCA	TAH	THA	TAL	TLA	0x
1x	PHA	PLA	PHL	PLL	CPB	CPC	SUB	SUC	SAL	SAR							1x
2x	JML	JSL	RTN														2x
3x																	3x
4x									STA	STB	STC	LDB	LDC	LDA	LDA	LDA	4x
5x	LDA	LDA	LDA	LDA	LDB	LDB	LDC	LDC	STA	STA	STA	STB	STC				5x
6x	CMP	CPB	CPC														6x
7x																	7x
8x																	8x
9x																	9x
Ax																	Ax
Bx	JMP	JSR	BCF	BNF	BZF												Bx
Cx	LDA	STA															Cx
Dx																	Dx
Ex																	Ex
Fx																	Fx
-	x0	x1	x2	x3	x4	x5	x6	x7	x8	x9	xA	xB	xC	xD	xE	xF

Opcode	Parameters	Description
HLT (0x00)	-	Halts the CPU
INA (0x01)	-	Increments the accumulator
DEA (0x02)	-	Decrements the accumulator
INL (0x03)	-	Increments the HL register
DEL (0x04)	-	Decrements the HL register
CLC (0x05)	-	Clear the Carry flag
ADB (0x06)	-	Add B to Accumulator
ADC (0x07)	-	Add C to Accumulator
TAB (0x08)	-	Transfer Accumulator into B register
TBA (0x09)	-	Transfer B register into Accumulator
TAC (0x0A)	-	Transfer Accumulator into C register
TCA (0x0B)	-	Transfer C register into Accumulator
TAH (0x0C)	-	Transfer Accumulator into H register
THA (0x0D)	-	Transfer H register into Accumulator
TAL (0x0E)	-	Transfer Accumulator into L register
TLA (0x0F)	-	Transfer L register into Accumulator
PHA (0x10)	-	Push the accumulator's value in the stack
PLA (0x11)	-	Pull the stack value in the accumulator
PHL (0x12)	-	Push the HL's value in the stack
PLL (0x13)	-	Pull two bytes from the stack in the HL register
CPB (0x14)	-	Compare B with the Accumulator
CPC (0x15)	-	Compare C with the Accumulator
SUB (0x16)	-	Substract B to accumulator
SUC (0x17)	-	Substract C to accumulator
SAL (0x18)	-	Shift Accumulator Left
SAR (0x19)	-	Shift Accumulator Right
INB (0x1A)	-	Increments the B register
DEB (0x1B)	-	Decrements the B register
INC (0x1C)	-	Increments the C register
DEC (0x1D)	-	Decrements the C register
-	-	-
JML (0x20)	-	Jumps to the address HL
JSL (0x21)	-	Jumps to subroutine at address HL
RTN (0x22)	-	Return from SubRoutine
-	-	-
STA (0x48)	-	Stores the value of accumulator into address [HL]
STB (0x49)	-	Stores the value of B register into address [HL]
STC (0x4A)	-	Stores the value of C register into address [HL]
LDB (0x4B)	-	Loads the value of address [HL] into the B register
LDC (0x4C)	-	Loads the value of address [HL] into the C register
LDA (0x4D)	-	Loads the value of address [HL] into the accumulator
LDA (0x4E)	-	Loads the value of address [HL]+B into the accumulator
LDA (0x4F)	-	Loads the value of address [HL]+C into the accumulator
LDA (0x50)	$1: number	Loads $1 into the accumulator
LDA (0x51)	[$1]: zero page address	Loads the value of address 0x0$1 into the accumulator
LDA (0x52)	$1: number	Loads the value of address H0 + $1 into the accumulator
LDA (0x53)	$1: number	Loads the value of address HL + $1 into the accumulator
LDB (0x54)	$1: number	Loads $1 into the B register
LDB (0x55)	[$1]: zero page address	Loads the value of address 0x0$1 into the B register
LDC (0x56)	$1: number	Loads $1 into the C register
LDC (0x57)	[$1]: zero page address	Loads the value of address 0x0$1 into the C register
STA (0x58)	[$1]: zero page address	Stores the value of Accumulator into address 0x0$1
STA (0x59)	$1: number	Stores the value of Accumulator into address H0 + $1
STA (0x5A)	$1: number	Stores the value of Accumulator into address HL + $1
STB (0x5B)	[$1]: zero page address	Stores the value of B register into address 0x0$1
STC (0x5C)	[$1]: zero page address	Stores the value of C register into address 0x0$1
-	-	-
CMP (0x60)	$1: number	Compares the accumulator with $1
CPB (0x61)	$1: number	Compares the B register with $1
CPC (0x62)	$1: number	Compares the C register with $1
-	-	-
JMP (0xB0)	$1$2: address	Jumps to the address $1$2
JSR (0xB1)	$1$2: address	Jumps to subroutine at address $1$2
BCF (0xB2)	$1$2: address	Branch on Carry flag
BNF (0xB3)	$1$2: address	Branch on Negative flag
BZF (0xB4)	$1$2: address	Branch on Zero flag
-	-	-
LDA (0xC0)	$1$2: address	Load the value of address $1$2 in the accumulator
STA (0xC1)	$1$2: address	Store the value of accumulator into address $1$2

diagram

IRQ: Interrupt Request (active low) RESET: Reset (active low) R/!W: Read Write mode CLOCK: Clock pin A0-9: Addresses IO0-7: Input/Output

       ---__---
  A0 --|1   26|-- VCC
  A1 --|2   25|-- R/!W
  A2 --|3   24|-- IO7
  A3 --|4   23|-- IO6
  A4 --|5   22|-- IO5
  A5 --|6   21|-- IO4
  A6 --|7   20|-- IO3
  A7 --|8   19|-- IO2
  A8 --|9   18|-- IO1
  A9 --|10  17|-- IO0
 A10 --|11  16|-- !IRQ
 A11 --|12  15|-- !RESET
 GND --|13  14|-- CLOCK
       --------

Implementations

impl SimpleCPU

pub const A0: u8

pub const A1: u8

pub const A2: u8

pub const A3: u8

pub const A4: u8

pub const A5: u8

pub const A6: u8

pub const A7: u8

pub const A8: u8

pub const A9: u8

pub const A10: u8

pub const A11: u8

pub const CLOCK: u8

pub const RESET: u8

pub const IRQ: u8

pub const IO0: u8

pub const IO1: u8

pub const IO2: u8

pub const IO3: u8

pub const IO4: u8

pub const IO5: u8

pub const IO6: u8

pub const IO7: u8

pub const RW: u8

pub const VCC: u8

pub const GND: u8

pub fn new() -> Self

Trait Implementations

impl Chip for SimpleCPU

fn get_uuid(&self) -> u128

Give a unique id to maintain continuity when saving. This uuid must not maintain any information other that identity. When saving, this value will be used to link the traced pins to their respective chip.

fn get_type(&self) -> &str

Give a unique name for the chip struct, it must be the same for every chips of the same struct. This value will be used to rebuild the correct Struct based on this name with the help of the chip factory

fn get_pin_qty(&self) -> u8

Returns the number of pins the chip has

fn get_pin(&mut self, pin: u8) -> Result<Rc<RefCell<Pin>>, &str>

Get a pin of the chip

fn run(&mut self, _: Duration)

Runs the chip for a certain amount of time

fn save_data(&self) -> Vec<String>

Create a Vec of String that must contain every information you need to restore your chip to a certain state. This will be saved in the resulting file.

fn load_data(&mut self, chip_data: &[String])

Using the array of String you provided in save_data , you must restore the state of your chip.

fn get_pin_state(&mut self, pin: u8) -> State

Get the state of the specified Pin

fn set_pin_state(&mut self, pin: u8, state: &State)

Set the state of the specified Pin

fn save(&self) -> SavedChip

Save the chip to a SavedChip struct

fn load(&mut self, saved_chip: &SavedChip)

Restore the chip from a SavedChip struct

impl Debug for SimpleCPU

fn fmt(&self, fmt: &mut Formatter) -> Result<(), Error>

Formats the value using the given formatter.

impl Default for SimpleCPU

fn default() -> Self

Returns the "default value" for a type.