Skip to main content

velesdb_core/simd_native/
mod.rs

1//! Native SIMD intrinsics for maximum performance.
2//!
3//! This module provides hand-tuned SIMD implementations using `core::arch` intrinsics
4//! for AVX-512, AVX2, and ARM NEON architectures.
5//!
6//! # Module Structure
7//!
8//! - `scalar` — Scalar fallback implementations and fast-rsqrt helpers
9//! - `tail_unroll` — Remainder/tail handling macros for SIMD loops
10//! - `prefetch` — CPU cache prefetch utilities
11//! - `reduction` — Shared horizontal sum helpers for SIMD accumulators
12//! - `x86_avx512` — AVX-512F kernel implementations (x86_64 only)
13//! - `x86_avx2` — AVX2+FMA dot product and squared L2 kernels (x86_64 only)
14//! - `x86_avx2_similarity` — AVX2+FMA cosine, Hamming, Jaccard kernels (x86_64 only)
15//! - `neon` — ARM NEON kernel implementations (aarch64 only)
16//! - `dispatch` — Runtime SIMD level detection and dispatch wiring
17//!
18//! # Performance (based on arXiv research)
19//!
20//! - **AVX-512**: True 16-wide f32 operations with masked remainder
21//! - **AVX2**: 8-wide f32 with FMA, multi-accumulator ILP
22//! - **ARM NEON**: Native 128-bit SIMD for Apple Silicon/ARM64
23//! - **Prefetch**: Software prefetching for cache optimization
24//!
25//! # References
26//!
27//! - arXiv:2505.07621 "Bang for the Buck: Vector Search on Cloud CPUs"
28//! - arXiv:2502.18113 "Accelerating Graph Indexing for ANNS on Modern CPUs"
29#![allow(clippy::doc_markdown)] // Contains ISA/architecture nomenclature in docs.
30#![allow(clippy::cast_lossless)] // Numeric widening in SIMD kernels is intentional.
31#![allow(clippy::missing_panics_doc)] // Dispatch APIs assert equal vector dimensions by design.
32
33// =============================================================================
34// Shared submodules (scalar, macros, prefetch)
35// =============================================================================
36
37pub mod prefetch;
38pub(crate) mod reduction;
39pub mod scalar;
40mod tail_unroll;
41
42// Re-export macros from tail_unroll for crate-wide use
43#[allow(unused_imports)]
44pub(crate) use tail_unroll::sum_remainder_unrolled_8;
45#[allow(unused_imports)]
46pub(crate) use tail_unroll::sum_squared_remainder_unrolled_8;
47
48// Re-export 4-accumulator loop macros from reduction for crate-wide use
49#[allow(unused_imports)]
50pub(crate) use reduction::simd_4acc_dot_loop;
51#[allow(unused_imports)]
52pub(crate) use reduction::simd_4acc_l2_loop;
53
54// Re-export public API from scalar
55pub use scalar::{cosine_similarity_fast, fast_rsqrt};
56
57// Re-export public API from prefetch
58pub use prefetch::{
59    calculate_prefetch_distance, prefetch_vector, prefetch_vector_multi_cache_line,
60    prefetch_vector_u64, L2_CACHE_LINE_BYTES,
61};
62
63// =============================================================================
64// Unsafe Invariants Reference
65// =============================================================================
66// SAFETY: Shared invariants for SIMD unsafe blocks in this module tree.
67// - Condition 1: All pointer arithmetic is derived from slice pointers with loop bounds
68//   proving in-range access for each lane width.
69// - Condition 2: Target-featured functions are called only after runtime feature checks
70//   or on architectures where the feature is guaranteed.
71// - Condition 3: Unaligned loads use `*_loadu_*`/masked-load intrinsics or equivalent
72//   APIs that permit unaligned access.
73// SAFETY: Intrinsics and pointer math are required for hot-path SIMD performance.
74
75// =============================================================================
76// ISA kernel submodules
77// =============================================================================
78
79#[cfg(target_arch = "x86_64")]
80mod x86_avx512;
81
82#[cfg(target_arch = "x86_64")]
83mod x86_avx2;
84
85#[cfg(target_arch = "x86_64")]
86mod x86_avx2_similarity;
87
88#[cfg(target_arch = "aarch64")]
89mod neon;
90
91// Re-export ISA kernels so dispatch.rs can access them via `super::`
92#[cfg(target_arch = "x86_64")]
93pub(crate) use x86_avx512::{
94    cosine_fused_avx512, cosine_fused_avx512_4acc, cosine_fused_avx512_8acc, dot_product_avx512,
95    dot_product_avx512_4acc, dot_product_avx512_8acc, hamming_avx512, hamming_avx512_4acc,
96    hamming_binary_avx512, hamming_binary_avx512_vpopcntdq, jaccard_avx512, jaccard_avx512_4acc,
97    jaccard_avx512_8acc, squared_l2_avx512, squared_l2_avx512_4acc, squared_l2_avx512_8acc,
98};
99
100#[cfg(target_arch = "x86_64")]
101pub(crate) use x86_avx2::{
102    dot_product_avx2, dot_product_avx2_1acc, dot_product_avx2_4acc, squared_l2_avx2,
103    squared_l2_avx2_1acc, squared_l2_avx2_4acc,
104};
105
106#[cfg(target_arch = "x86_64")]
107pub(crate) use x86_avx2_similarity::{
108    cosine_fused_avx2, cosine_fused_avx2_2acc, hamming_avx2, hamming_binary_avx2, jaccard_avx2,
109};
110
111#[cfg(target_arch = "aarch64")]
112pub(crate) use neon::{
113    cosine_neon, dot_product_neon, hamming_binary_neon, hamming_neon, jaccard_neon, squared_l2_neon,
114};
115
116// =============================================================================
117// ADC (Asymmetric Distance Computation) for PQ search
118// =============================================================================
119
120pub mod adc;
121
122// =============================================================================
123// Dispatch module (public API)
124// =============================================================================
125
126mod dispatch;
127
128pub use dispatch::{
129    batch_cosine_native, batch_dot_product_native, batch_euclidean_native, batch_hamming_native,
130    batch_jaccard_native, batch_squared_l2_native, cosine_normalized_native,
131    cosine_similarity_native, dot_product_native, euclidean_native, hamming_binary_native,
132    hamming_distance_native, jaccard_similarity_native, norm_native, normalize_inplace_native,
133    simd_level, squared_l2_native, warmup_simd_cache, DistanceEngine, SimdLevel,
134};
135
136// =============================================================================
137// Tests (separate files per project rules)
138// =============================================================================
139
140#[cfg(test)]
141mod simd_native_dispatch_tests;
142
143#[cfg(test)]
144mod cosine_fused_tests;
145
146#[cfg(test)]
147mod harley_seal_tests;
148
149#[cfg(test)]
150mod warmup_tests;
151
152#[cfg(test)]
153mod distance_engine_tests;
154
155#[cfg(test)]
156mod hamming_jaccard_tests;