1process_opcodes![
2 opcodes: {
3 (0x00, HALT, (), "Halt"),
4 (0x01, NOP, (), "No Operation"),
5 (0x02, REI, (), "Return from Exception or Interrupt"),
6 (0x03, BPT, (), "Breakpoint"),
7 (0x04, RET, (), "Return from Procedure"),
8 (0x05, RSB, (), "Return From Subroutine"),
9 (0x06, LDPCTX, (), "Load Process Context"),
10 (0x07, SVPCTX, (), "Save Process Context"),
11 (0x08, CVTPS, (srclen.rw, srcaddr.ab, dstlen.rw, dstaddr.ab), "Convert Packed to Leading Separate Numeric"),
12 (0x09, CVTSP, (srclen.rw, srcaddr.ab, dstlen.rw, dstaddr.ab), "Convert Leading Separate Numeric to Packed"),
13 (0x0A, INDEX, (subscript.rl, low.rl, high.rl, size.rl, indexin.rl, indexout.wl), "Compute Index"),
14 (0x0B, CRC, (tbl.ab, inicrc.rl, strlen.rw, stream.ab), "Calculate Cyclic Redundancy Check"),
15 (0x0C, PROBER, (mode.rb, len.rw, base.ab), "Probe Read Accessibility"),
16 (0x0D, PROBEW, (mode.rb, len.rw, base.ab), "Probe Write Accessibility"),
17 (0x0E, INSQUE, (entry.ab, pred.ab), "Insert Entry in Queue"),
18 (0x0F, REMQUE, (entry.ab, addr.wl), "Remove Entry from Queue"),
19 (0x10, BSBB, (displ.bb), "Branch to Subroutine With Byte Displacement"),
20 (0x11, BRB, (displ.bb), "Branch With Byte Displacement"),
21 (0x12, BNEQ, (displ.bb), "Branch on Not Equal (signed) [Z EQL 0]"),
22 (0x13, BEQL, (displ.bb), "Branch on Equal (signed) [Z EQL 1]"),
23 (0x14, BGTR, (displ.bb), "Branch on Greater Than (signed) [{N OR Z} EQL 0]"),
24 (0x15, BLEQ, (displ.bb), "Branch on Less Than or Equal (signed) [{N OR Z} EQL 1]"),
25 (0x16, JSB, (dst.ab), "Jump to Subroutine"),
26 (0x17, JMP, (dst.ab), "Jump"),
27 (0x18, BGEQ, (displ.bb), "Branch on Greater Than or Equal (signed) [N EQL 0]"),
28 (0x19, BLSS, (displ.bb), "Branch on Less Than (signed) [N EQL 1]"),
29 (0x1A, BGTRU, (displ.bb), "Branch on Greater Than (unsigned) [{C OR Z} EQL 0]"),
30 (0x1B, BLEQU, (displ.bb), "Branch on Less Than or Equal (unsigned) [{C OR Z} EQL 1]"),
31 (0x1C, BVC, (displ.bb), "Branch on Overflow Clear [V EQL 0]"),
32 (0x1D, BVS, (displ.bb), "Branch on Overflow Set [V EQL 1]"),
33 (0x1E, BGEQU, (displ.bb), "Branch on Greater Than or Equal (unsigned) [C EQL 0]"),
34 (0x1F, BLSSU, (displ.bb), "Branch on Less Than (unsigned) [C EQL 1]"),
35 (0x20, ADDP4, (addlen.rw, addaddr.ab, sumlen.rw, sumaddr.ab), "Add Packed 4 Operand"),
36 (0x21, ADDP6, (add1len.rw, add1addr.ab, add2len.rw, add2addr.ab, sumlen.rw, sumaddr.ab), "Add Packed 6 Operand"),
37 (0x22, SUBP4, (sublen.rw, subaddr.ab, diflen.rw, difaddr.ab), "Subtract Packed 4 Operand"),
38 (0x23, SUBP6, (sublen.rw, subaddr.ab, minlen.rw, minaddr.ab, diflen.rw, difaddr.ab), "Subtract Packed 6 Operand"),
39 (0x24, CVTPT, (srclen.rw, srcaddr.ab, tbladdr.ab, dstlen.rw, dstaddr.ab), "Convert Packed to Trailing Numeric"),
40 (0x25, MULP, (mulrlen.rw, mulraddr.ab, muldlen.rw, muldaddr.ab, prodlen.rw, prodaddr.ab), "Multiply Packed"),
41 (0x26, CVTTP, (srclen.rw, srcaddr.ab, tbladdr.ab, dstlen.rw, dstaddr.ab), "Convert Trailing Numeric to Packed"),
42 (0x27, DIVP, (divrlen.rw, divraddr.ab, divdlen.rw, divdaddr.ab, quolen.rw, quoaddr.ab), "Divide Packed"),
43 (0x28, MOVC3, (len.rw, srcaddr.ab, dstaddr.ab), "Move Character 3 Operand"),
44 (0x29, CMPC3, (len.rw, src1addr.ab, src2addr.ab), "Compare Characters 3 Operand"),
45 (0x2A, SCANC, (len.rw, addr.ab, tbladdr.ab, mask.rb), "Scan Characters"),
46 (0x2B, SPANC, (len.rw, addr.ab, tbladdr.ab, mask.rb), "Span Characters"),
47 (0x2C, MOVC5, (srclen.rw, srcaddr.ab, fill.rb, dstlen.rw, dstaddr.ab), "Move Character 5 Operand"),
48 (0x2D, CMPC5, (src1len.rw, src1addr.ab, fill.rb, src2len.rw, src2addr.ab), "Compare Characters 5 Operand"),
49 (0x2E, MOVTC, (srclen.rw, srcaddr.ab, fill.rb, tbladdr.ab, dstlen.rw, dstaddr.ab), "Move Translated Characters"),
50 (0x2F, MOVTUC, (srclen.rw, srcaddr.ab, esc.rb, tbladdr.ab, dstlen.rw, dstaddr.ab), "Move Translated Until Character"),
51 (0x30, BSBW, (displ.bw), "Branch to Subroutine With Word Displacement"),
52 (0x31, BRW, (displ.bw), "Branch With Word Displacement"),
53 (0x32, CVTWL, (src.rw, dst.wl), "Convert Word to Long"),
54 (0x33, CVTWB, (src.rw, dst.wb), "Convert Word to Byte"),
55 (0x34, MOVP, (len.rw, srcaddr.ab, dstaddr.ab), "Move Packed"),
56 (0x35, CMPP3, (len.rw, src1addr.ab, src2addr.ab), "Compare Packed 3 Operand"),
57 (0x36, CVTPL, (srclen.rw, srcaddr.ab, dst.wl), "Convert Packed to Long"),
58 (0x37, CMPP4, (src1len.rw, src1addr.ab, src2len.rw, src2addr.ab), "Compare Packed 4 Operand"),
59 (0x38, EDITPC, (srclen.rw, srcaddr.ab, pattern.ab, dstaddr.ab), "Edit Packed to Character String"),
60 (0x39, MATCHC, (objlen.rw, objaddr.ab, srclen.rw, srcaddr.ab), "Match Character"),
61 (0x3A, LOCC, (char.rb, len.rw, addr.ab), "Locate Character"),
62 (0x3B, SKPC, (char.rb, len.rw, addr.ab), "Skip Character"),
63 (0x3C, MOVZWL, (src.rw, dst.wl), "Move Zero-Extended Word to Long"),
64 (0x3D, ACBW, (limit.rw, add.rw, index.mw, displ.bw), "Add Compare and Branch Word"),
65 (0x3E, MOVAW, (src.aw, dst.wl), "Move Address Word"),
66 (0x3F, PUSHAW, (src.aw), "Push Address Word"),
67 (0x40, ADDF2, (add.rf, sum.mf), "Add F_floating 2 Operand"),
68 (0x41, ADDF3, (add1.rf, add2.rf, sum.wf), "Add F_floating 3 Operand"),
69 (0x42, SUBF2, (sub.rf, dif.mf), "Subtract F_floating 2 Operand"),
70 (0x43, SUBF3, (sub.rf, min.rf, dif.wf), "Subtract F_floating 3 Operand"),
71 (0x44, MULF2, (mulr.rf, prod.mf), "Multiply F_floating 2 Operand"),
72 (0x45, MULF3, (mulr.rf, muld.rf, prod.wf), "Multiply F_floating 3 Operand"),
73 (0x46, DIVF2, (divr.rf, quo.mf), "Divide F_floating 2 Operand"),
74 (0x47, DIVF3, (divr.rf, divd.rf, quo.wf), "Divide F_floating 3 Operand"),
75 (0x48, CVTFB, (src.rf, dst.wb), "Convert F_floating to Byte"),
76 (0x49, CVTFW, (src.rf, dst.ww), "Convert F_floating to Word"),
77 (0x4A, CVTFL, (src.rf, dst.wl), "Convert F_floating to Long"),
78 (0x4B, CVTRFL, (src.rf, dst.wl), "Convert Rounded F_floating to Long"),
79 (0x4C, CVTBF, (src.rb, dst.wf), "Convert Byte to F_floating"),
80 (0x4D, CVTWF, (src.rw, dst.wf), "Convert Word to F_floating"),
81 (0x4E, CVTLF, (src.rl, dst.wf), "Convert Long to F_floating"),
82 (0x4F, ACBF, (limit.rf, add.rf, index.mf, displ.bw), "Add Compare and Branch F_floating"),
83 (0x50, MOVF, (src.rf, dst.wf), "Move F_floating"),
84 (0x51, CMPF, (src1.rf, src2.rf), "Compare F_floating"),
85 (0x52, MNEGF, (src.rf, dst.wf), "Move Negated F_floating"),
86 (0x53, TSTF, (src.rf), "Test F_floating"),
87 (0x54, EMODF, (mulr.rf, mulrx.rb, muld.rf, int.wl, fract.wf), "Extended Multiply and Integerize F_floating"),
88 (0x55, POLYF, (arg.rf, degree.rw, tbladdr.ab), "Polynomial Evaluation F_floating"),
89 (0x56, CVTFD, (src.rf, dst.wd), "Convert F_floating to D_floating"),
90 (0x58, ADAWI, (add.rw, sum.mw), "Add Aligned Word Interlocked"),
92 (0x5C, INSQHI, (entry.ab, header.aq), "Insert Entry into Queue at Head Interlocked"),
96 (0x5D, INSQTI, (entry.ab, header.aq), "Insert Entry into Queue at Tail Interlocked"),
97 (0x5E, REMQHI, (header.aq, addr.wl), "Remove Entry from Queue at Head Interlocked"),
98 (0x5F, REMQTI, (header.aq, addr.wl), "Remove Entry from Queue at Tail Interlocked"),
99 (0x60, ADDD2, (add.rd, sum.md), "Add D_floating 2 Operand"),
100 (0x61, ADDD3, (add1.rd, add2.rd, sum.wd), "Add D_floating 3 Operand"),
101 (0x62, SUBD2, (sub.rd, dif.md), "Subtract D_floating 2 Operand"),
102 (0x63, SUBD3, (sub.rd, min.rd, dif.wd), "Subtract D_floating 3 Operand"),
103 (0x64, MULD2, (mulr.rd, prod.md), "Multiply D_floating 2 Operand"),
104 (0x65, MULD3, (mulr.rd, muld.rd, prod.wd), "Multiply D_floating 3 Operand"),
105 (0x66, DIVD2, (divr.rd, quo.md), "Divide D_floating 2 Operand"),
106 (0x67, DIVD3, (divr.rd, divd.rd, quo.wd), "Divide D_floating 3 Operand"),
107 (0x68, CVTDB, (src.rd, dst.wb), "Convert D_floating to Byte"),
108 (0x69, CVTDW, (src.rd, dst.ww), "Convert D_floating to Word"),
109 (0x6A, CVTDL, (src.rd, dst.wl), "Convert D_floating to Long"),
110 (0x6B, CVTRDL, (src.rd, dst.wl), "Convert Rounded D_floating to Long"),
111 (0x6C, CVTBD, (src.rb, dst.wd), "Convert Byte to D_floating"),
112 (0x6D, CVTWD, (src.rw, dst.wd), "Convert Word to D_floating"),
113 (0x6E, CVTLD, (src.rl, dst.wd), "Convert Long to D_floating"),
114 (0x6F, ACBD, (limit.rd, add.rd, index.md, displ.bw), "Add Compare and Branch D_floating"),
115 (0x70, MOVD, (src.rd, dst.wd), "Move D_floating"),
116 (0x71, CMPD, (src1.rd, src2.rd), "Compare D_floating"),
117 (0x72, MNEGD, (src.rd, dst.wd), "Move Negated D_floating"),
118 (0x73, TSTD, (src.rd), "Test D_floating"),
119 (0x74, EMODD, (mulr.rd, mulrx.rb, muld.rd, int.wl, fract.wd), "Extended Multiply and Integerize D_floating"),
120 (0x75, POLYD, (arg.rd, degree.rw, tbladdr.ab), "Polynomial Evaluation D_floating"),
121 (0x76, CVTDF, (src.rd, dst.wf), "Convert D_floating to F_floating"),
122 (0x78, ASHL, (cnt.rb, src.rl, dst.wl), "Arithmetic Shift Long"),
124 (0x79, ASHQ, (cnt.rb, src.rq, dst.wq), "Arithmetic Shift Quad"),
125 (0x7A, EMUL, (mulr.rl, muld.rl, add.rl, prod.wq), "Extended Multiply"),
126 (0x7B, EDIV, (divr.rl, divd.rq, quo.wl, rem.wl), "Extended Divide"),
127 (0x7C, CLRQ, (dst.wq), "Clear Quad"),
128 (0x7D, MOVQ, (src.rq, dst.wq), "Move Quad"),
129 (0x7E, MOVAQ, (src.aq, dst.wl), "Move Address Quad"),
130 (0x7F, PUSHAQ, (src.aq), "Push Address Quad"),
131 (0x80, ADDB2, (add.rb, sum.mb), "Add Byte 2 Operand"),
132 (0x81, ADDB3, (addl.rb, add2.rb, sum.wb), "Add Byte 3 Operand"),
133 (0x82, SUBB2, (sub.rb, dif.mb), "Subtract Byte 2 Operand"),
134 (0x83, SUBB3, (sub.rb, min.rb, dif.wb), "Subtract Byte 3 Operand"),
135 (0x84, MULB2, (mulr.rb, prod.mb), "Multiply Byte 2 Operand"),
136 (0x85, MULB3, (mulr.rb, muld.rb, prod.wb), "Multiply Byte 3 Operand"),
137 (0x86, DIVB2, (divr.rb, quo.mb), "Divide Byte 2 Operand"),
138 (0x87, DIVB3, (divr.rb, divd.rb, quo.wb), "Divide Byte 3 Operand"),
139 (0x88, BISB2, (mask.rb, dst.mb), "Bit Set Byte 2 Operand"),
140 (0x89, BISB3, (mask.rb, src.rb, dst.wb), "Bit Set Byte 3 Operand"),
141 (0x8A, BICB2, (mask.rb, dst.mb), "Bit Clear Byte 2 Operand"),
142 (0x8B, BICB3, (mask.rb, src.rb, dst.wb), "Bit Clear Byte 3 Operand"),
143 (0x8C, XORB2, (mask.rb, dst.mb), "Exclusive-OR Byte 2 Operand"),
144 (0x8D, XORB3, (mask.rb, src.rb, dst.wb), "Exclusive-OR Byte 3 Operand"),
145 (0x8E, MNEGB, (src.rb, dst.wb), "Move Negated Byte"),
146 (0x8F, CASEB, (selector.rb, base.rb, limit.rb), "Case Byte"),
147 (0x90, MOVB, (src.rb, dst.wb), "Move Byte"),
148 (0x91, CMPB, (src1.rb, src2.rb), "Compare Byte"),
149 (0x92, MCOMB, (src.rb, dst.wb), "Move Complemented Byte"),
150 (0x93, BITB, (mask.rb, src.rb), "Bit Test Byte"),
151 (0x94, CLRB, (dst.wb), "Clear Byte"),
152 (0x95, TSTB, (src.rb), "Test Byte"),
153 (0x96, INCB, (sum.mb), "Increment Byte"),
154 (0x97, DECB, (dif.mb), "Decrement Byte"),
155 (0x98, CVTBL, (src.rb, dst.wl), "Convert Byte to Long"),
156 (0x99, CVTBW, (src.rb, dst.ww), "Convert Byte to Word"),
157 (0x9A, MOVZBL, (src.rb, dst.wl), "Move Zero-Extended Byte to Long"),
158 (0x9B, MOVZBW, (src.rb, dst.ww), "Move Zero-Extended Byte to Word"),
159 (0x9C, ROTL, (cnt.rb, src.rl, dst.wl), "Rotate Long"),
160 (0x9D, ACBB, (limit.rb, add.rb, index.mb, displ.bw), "Add Compare and Branch Byte"),
161 (0x9E, MOVAB, (src.ab, dst.wl), "Move Address Byte"),
162 (0x9F, PUSHAB, (src.ab), "Push Address Byte"),
163 (0xA0, ADDW2, (add.rw, sum.mw), "Add Word 2 Operand"),
164 (0xA1, ADDW3, (addl.rw, add2.rw, sum.ww), "Add Word 3 Operand"),
165 (0xA2, SUBW2, (sub.rw, dif.mw), "Subtract Word 2 Operand"),
166 (0xA3, SUBW3, (sub.rw, min.rw, dif.ww), "Subtract Word 3 Operand"),
167 (0xA4, MULW2, (mulr.rw, prod.mw), "Multiply Word 2 Operand"),
168 (0xA5, MULW3, (mulr.rw, muld.rw, prod.ww), "Multiply Word 3 Operand"),
169 (0xA6, DIVW2, (divr.rw, quo.mw), "Divide Word 2 Operand"),
170 (0xA7, DIVW3, (divr.rw, divd.rw, quo.ww), "Divide Word 3 Operand"),
171 (0xA8, BISW2, (mask.rw, dst.mw), "Bit Set Word 2 Operand"),
172 (0xA9, BISW3, (mask.rw, src.rw, dst.ww), "Bit Set Word 3 Operand"),
173 (0xAA, BICW2, (mask.rw, dst.mw), "Bit Clear Word 2 Operand"),
174 (0xAB, BICW3, (mask.rw, src.rw, dst.ww), "Bit Clear Word 3 Operand"),
175 (0xAC, XORW2, (mask.rw, dst.mw), "Exclusive-OR Word 2 Operand"),
176 (0xAD, XORW3, (mask.rw, src.rw, dst.ww), "Exclusive-OR Word 3 Operand"),
177 (0xAE, MNEGW, (src.rw, dst.ww), "Move Negated Word"),
178 (0xAF, CASEW, (selector.rw, base.rw, limit.rw), "Case Word"),
179 (0xB0, MOVW, (src.rw, dst.ww), "Move Word"),
180 (0xB1, CMPW, (src1.rw, src2.rw), "Compare Word"),
181 (0xB2, MCOMW, (src.rw, dst.ww), "Move Complemented Word"),
182 (0xB3, BITW, (mask.rw, src.rw), "Bit Test Word"),
183 (0xB4, CLRW, (dst.ww), "Clear Word"),
184 (0xB5, TSTW, (src.rw), "Test Word"),
185 (0xB6, INCW, (sum.mw), "Increment Word"),
186 (0xB7, DECW, (dif.mw), "Decrement Word"),
187 (0xB8, BISPSW, (mask.rw), "Bit Set PSW"),
188 (0xB9, BICPSW, (mask.rw), "Bit Clear PSW"),
189 (0xBA, POPR, (mask.rw), "Pop Registers"),
190 (0xBB, PUSHR, (mask.rw), "Push Registers"),
191 (0xBC, CHMK, (code.rw), "Change Mode to Kernel"),
192 (0xBD, CHME, (code.rw), "Change Mode to Executive"),
193 (0xBE, CHMS, (code.rw), "Change Mode to Supervisor"),
194 (0xBF, CHMU, (code.rw), "Change Mode to User"),
195 (0xC0, ADDL2, (add.rl, sum.ml), "Add Long 2 Operand"),
196 (0xC1, ADDL3, (addl.rl, add2.rl, sum.wl), "Add Long 3 Operand"),
197 (0xC2, SUBL2, (sub.rl, dif.ml), "Subtract Long 2 Operand"),
198 (0xC3, SUBL3, (sub.rl, min.rl, dif.wl), "Subtract Long 3 Operand"),
199 (0xC4, MULL2, (mulr.rl, prod.ml), "Multiply Long 2 Operand"),
200 (0xC5, MULL3, (mulr.rl, muld.rl, prod.wl), "Multiply Long 3 Operand"),
201 (0xC6, DIVL2, (divr.rl, quo.ml), "Divide Long 2 Operand"),
202 (0xC7, DIVL3, (divr.rl, divd.rl, quo.wl), "Divide Long 3 Operand"),
203 (0xC8, BISL2, (mask.rl, dst.ml), "Bit Set Long 2 Operand"),
204 (0xC9, BISL3, (mask.rl, src.rl, dst.wl), "Bit Set Long 3 Operand"),
205 (0xCA, BICL2, (mask.rl, dst.ml), "Bit Clear Long 2 Operand"),
206 (0xCB, BICL3, (mask.rl, src.rl, dst.wl), "Bit Clear Long 3 Operand"),
207 (0xCC, XORL2, (mask.rl, dst.ml), "Exclusive-OR Long 2 Operand"),
208 (0xCD, XORL3, (mask.rl, src.rl, dst.wl), "Exclusive-OR Long 3 Operand"),
209 (0xCE, MNEGL, (src.rl, dst.wl), "Move Negated Long"),
210 (0xCF, CASEL, (selector.rl, base.rl, limit.rl), "Case Long"),
211 (0xD0, MOVL, (src.rl, dst.wl), "Move Long"),
212 (0xD1, CMPL, (src1.rl, src2.rl), "Compare Long"),
213 (0xD2, MCOML, (src.rl, dst.wl), "Move Complemented Long"),
214 (0xD3, BITL, (mask.rl, src.rl), "Bit Test Long"),
215 (0xD4, CLRL, (dst.wl), "Clear Long"),
216 (0xD5, TSTL, (src.rl), "Test Long"),
217 (0xD6, INCL, (sum.ml), "Increment Long"),
218 (0xD7, DECL, (dif.ml), "Decrement Long"),
219 (0xD8, ADWC, (add.rl, sum.ml), "Add With Carry"),
220 (0xD9, SBWC, (sub.rl, dif.ml), "Subtract With Carry"),
221 (0xDA, MTPR, (src.rl, procreg.rl), "Move To Processor Register"),
222 (0xDB, MFPR, (procreg.rl, dst.wl), "Move From Processor Register"),
223 (0xDC, MOVPSL, (dst.wl), "Move from PSL"),
224 (0xDD, PUSHL, (src.rl), "Push Long"),
225 (0xDE, MOVAL, (src.al, dst.wl), "Move Address Long"),
226 (0xDF, PUSHAL, (src.al), "Push Address Long"),
227 (0xE0, BBS, (pos.rl, base.vb, displ.bb), "Branch on Bit Set"),
228 (0xE1, BBC, (pos.rl, base.vb, displ.bb), "Branch on Bit Clear"),
229 (0xE2, BBSS, (pos.rl, base.vb, displ.bb), "Branch on Bit Set and Set"),
230 (0xE3, BBCS, (pos.rl, base.vb, displ.bb), "Branch on Bit Clear and Set"),
231 (0xE4, BBSC, (pos.rl, base.vb, displ.bb), "Branch on Bit Set and Clear"),
232 (0xE5, BBCC, (pos.rl, base.vb, displ.bb), "Branch on Bit Clear and Clear"),
233 (0xE6, BBSSI, (pos.rl, base.vb, displ.bb), "Branch on Bit Set and Set Interlocked"),
234 (0xE7, BBCCI, (pos.rl, base.vb, displ.bb), "Branch on Bit Clear and Clear Interlocked"),
235 (0xE8, BLBS, (src.rl, displ.bb), "Branch on Low Bit Set"),
236 (0xE9, BLBC, (src.rl, displ.bb), "Branch on Low Bit Clear"),
237 (0xEA, FFS, (startpos.rl, size.rb, base.vb, findpos.wl), "Find First Set"),
238 (0xEB, FFC, (startpos.rl, size.rb, base.vb, findpos.wl), "Find First Clear"),
239 (0xEC, CMPV, (pos.rl, size.rb, base.vb, src.rl), "Compare Field"),
240 (0xED, CMPZV, (pos.rl, size.rb, base.vb, src.rl), "Compare Zero-Extended Field"),
241 (0xEE, EXTV, (pos.rl, size.rb, base.vb, dst.wl), "Extract Field"),
242 (0xEF, EXTZV, (pos.rl, size.rb, base.vb, dst.wl), "Extract Zero-Extended Field"),
243 (0xF0, INSV, (src.rl, pos.rl, size.rb, base.vb), "Insert Field"),
244 (0xF1, ACBL, (limit.rl, add.rl, index.ml, displ.bw), "Add Compare and Branch Long"),
245 (0xF2, AOBLSS, (limit.rl, index.ml, displ.bb), "Add One and Branch Less Than"),
246 (0xF3, AOBLEQ, (limit.rl, index.ml, displ.bb), "Add One and Branch Less Than or Equal"),
247 (0xF4, SOBGEQ, (index.ml, displ.bb), "Subtract One and Branch Greater Than or Equal"),
248 (0xF5, SOBGTR, (index.ml, displ.bb), "Subtract One and Branch Greater Than"),
249 (0xF6, CVTLB, (src.rl, dst.wb), "Convert Long to Byte"),
250 (0xF7, CVTLW, (src.rl, dst.ww), "Convert Long to Word"),
251 (0xF8, ASHP, (cnt.rb, srclen.rw, srcaddr.ab, round.rb, dstlen.rw, dstaddr.ab), "Arithmetic Shift and Round Packed"),
252 (0xF9, CVTLP, (src.rl, dstlen.rw, dstaddr.ab), "Convert Long to Packed"),
253 (0xFA, CALLG, (arglist.ab, dst.ab), "Call Procedure with General Argument List"),
254 (0xFB, CALLC, (numarg.rl, dst.ab), "Call Procedure with Stack Argument List"),
255 (0xFC, XFC, (), "Extended Function Call "),
256 (0x32FD, CVTDH, (src.rd, dst.wh), "Convert D_floating to H_floating"),
261 (0x33FD, CVTGF, (src.rg, dst.wf), "Convert G_floating to F_floating"),
262 (0x40FD, ADDG2, (add.rg, sum.mg), "Add G_floating 2 Operand"),
264 (0x41FD, ADDG3, (add1.rg, add2.rg, sum.wg), "Add G_floating 3 Operand"),
265 (0x42FD, SUBG2, (sub.rg, dif.mg), "Subtract G_floating 2 Operand"),
266 (0x43FD, SUBG3, (sub.rg, min.rg, dif.wg), "Subtract G_floating 3 Operand"),
267 (0x44FD, MULG2, (mulr.rg, prod.mg), "Multiply G_floating 2 Operand"),
268 (0x45FD, MULG3, (mulr.rg, muld.rg, prod.wg), "Multiply G_floating 3 Operand"),
269 (0x46FD, DIVG2, (divr.rg, quo.mg), "Divide G_floating 2 Operand"),
270 (0x47FD, DIVG3, (divr.rg, divd.rg, quo.wg), "Divide G_floating 3 Operand"),
271 (0x48FD, CVTGB, (src.rg, dst.wb), "Convert G_floating to Byte"),
272 (0x49FD, CVTGW, (src.rg, dst.ww), "Convert G_floating to Word"),
273 (0x4AFD, CVTGL, (src.rg, dst.wl), "Convert G_floating to Long"),
274 (0x4BFD, CVTRGL, (src.rg, dst.wl), "Convert Rounded G_floating to Long"),
275 (0x4CFD, CVTBG, (src.rb, dst.wg), "Convert Byte to G_floating"),
276 (0x4DFD, CVTWG, (src.rw, dst.wg), "Convert Word to G_floating"),
277 (0x4EFD, CVTLG, (src.rl, dst.wg), "Convert Long to G_floating"),
278 (0x4FFD, ACBG, (limit.rg, add.rg, index.mg, displ.bw), "Add Compare and Branch G_floating"),
279 (0x50FD, MOVG, (src.rg, dst.wg), "Move G_floating"),
280 (0x51FD, CMPG, (src1.rg, src2.rg), "Compare G_floating"),
281 (0x52FD, MNEGG, (src.rg, dst.wg), "Move Negated G_floating"),
282 (0x53FD, TSTG, (src.rg), "Test G_floating"),
283 (0x54FD, EMODG, (mulr.rg, mulrx.rw, muld.rg, int.wl, fract.wg), "Extended Multiply and Integerize G_floating"),
284 (0x55FD, POLYG, (arg.rg, degree.rw, tbladdr.ab), "Polynomial Evaluation G_floating"),
285 (0x56FD, CVTGH, (src.rg, dst.wh), "Convert G_floating to H_floating"),
286 (0x60FD, ADDH2, (add.rh, sum.mh), "Add H_floating 2 Operand"),
288 (0x61FD, ADDH3, (add1.rh, add2.rh, sum.wh), "Add H_floating 3 Operand"),
289 (0x62FD, SUBH2, (sub.rh, dif.mh), "Subtract H_floating 2 Operand"),
290 (0x63FD, SUBH3, (sub.rh, min.rh, dif.wh), "Subtract H_floating 3 Operand"),
291 (0x64FD, MULH2, (mulr.rh, prod.mh), "Multiply H_floating 2 Operand"),
292 (0x65FD, MULH3, (mulr.rh, muld.rh, prod.wh), "Multiply H_floating 3 Operand"),
293 (0x66FD, DIVH2, (divr.rh, quo.mh), "Divide H_floating 2 Operand"),
294 (0x67FD, DIVH3, (divr.rh, divd.rh, quo.wh), "Divide H_floating 3 Operand"),
295 (0x68FD, CVTHB, (src.rh, dst.wb), "Convert H_floating to Byte"),
296 (0x69FD, CVTHW, (src.rh, dst.ww), "Convert H_floating to Word"),
297 (0x6AFD, CVTHL, (src.rh, dst.wl), "Convert H_floating to Long"),
298 (0x6BFD, CVTRHL, (src.rh, dst.wl), "Convert Rounded H_floating to Long"),
299 (0x6CFD, CVTBH, (src.rb, dst.wh), "Convert Byte to H_floating"),
300 (0x6DFD, CVTWH, (src.rw, dst.wh), "Convert Word to H_floating"),
301 (0x6EFD, CVTLH, (src.rl, dst.wh), "Convert Long to H_floating"),
302 (0x6FFD, ACBH, (limit.rh, add.rh, index.mh, displ.bw), "Add Compare and Branch H_floating"),
303 (0x70FD, MOVH, (src.rh, dst.wh), "Move H_floating"),
304 (0x71FD, CMPH, (src1.rh, src2.rh), "Compare H_floating"),
305 (0x72FD, MNEGH, (src.rh, dst.wh), "Move Negated H_floating"),
306 (0x73FD, TSTH, (src.rh), "Test H_floating"),
307 (0x74FD, EMODH, (mulr.rh, mulrx.rw, muld.rh, int.wl, fract.wh), "Extended Multiply and Integerize H_floating"),
308 (0x75FD, POLYH, (arg.rh, degree.rw, tbladdr.ab), "Polynomial Evaluation H_floating"),
309 (0x76FD, CVTHG, (src.rh, dst.wg), "Convert H_floating to G_floating"),
310 (0x7CFD, CLRO, (dst.wo), "Clear Octa"),
312 (0x7DFD, MOVO, (src.ro, dst.wo), "Move Octa"),
313 (0x7EFD, MOVAO, (src.ao, dst.wl), "Move Address Octa"),
314 (0x7FFD, PUSHAO, (src.ao), "Push Address Octa"),
315 (0x98FD, CVTFH, (src.rf, dst.wh), "Convert F_floating to H_floating"),
317 (0x99FD, CVTFG, (src.rf, dst.wg), "Convert F_floating to G_floating"),
318 (0xF6FD, CVTHF, (src.rh, dst.wf), "Convert H_floating to F_floating"),
320 (0xF7FD, CVTHD, (src.rh, dst.wd), "Convert H_floating to D_floating"),
321 (0xFDFF, BUGL, (message.bw), "Bugcheck with Longword Message Identifier"),
325 (0xFEFF, BUGW, (message.bl), "Bugcheck with Word Message Identifier"),
326 },
328 duplicates: {
329 (0x12, BNEQU, (displ.bb), "Branch on Not Equal Unsigned [Z EQL 0]"),
330 (0x13, BEQLU, (displ.bb), "Branch on Equal Unsigned [Z EQL 1]"),
331 (0x1E, BCC, (displ.bb), "Branch on Carry Clear [C EQL 0]"),
332 (0x1F, BCS, (displ.bb), "Branch on Carry Set [C EQL 1]"),
333 (0x7C, CLRD, (dst.wd), "Clear D_floating"),
334 (0x7C, CLRG, (dst.wg), "Clear G_floating"),
335 (0x7E, MOVAD, (src.ad, dst.wl), "Move Address D_floating"),
336 (0x7E, MOVAG, (src.ag, dst.wl), "Move Address G_floating"),
337 (0x7F, PUSHAD, (src.ad), "Push Address D_floating"),
338 (0x7F, PUSHAG, (src.ag), "Push Address G_floating"),
339 (0x7CFD, CLRH, (dst.wh), "Clear H_floating"),
340 (0x7EFD, MOVAH, (src.ah, dst.wl), "Move Address H_floating"),
341 (0x7FFD, PUSHAH, (src.ah), "Push Address H_floating"),
342 }
343];