va416xx/
tim0.rs

1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    ctrl: Ctrl,
5    rst_value: RstValue,
6    cnt_value: CntValue,
7    enable: Enable,
8    csd_ctrl: CsdCtrl,
9    cascade0: Cascade0,
10    cascade1: Cascade1,
11    cascade2: Cascade2,
12    _reserved_8_pwm_value: [u8; 0x04],
13    pwmb_value: PwmbValue,
14    _reserved10: [u8; 0x03d4],
15    perid: Perid,
16}
17impl RegisterBlock {
18    #[doc = "0x00 - Control Register"]
19    #[inline(always)]
20    pub const fn ctrl(&self) -> &Ctrl {
21        &self.ctrl
22    }
23    #[doc = "0x04 - The value that counter start from after reaching 0."]
24    #[inline(always)]
25    pub const fn rst_value(&self) -> &RstValue {
26        &self.rst_value
27    }
28    #[doc = "0x08 - The current value of the counter"]
29    #[inline(always)]
30    pub const fn cnt_value(&self) -> &CntValue {
31        &self.cnt_value
32    }
33    #[doc = "0x0c - Alternate access to the Counter ENABLE bit in the CTRL Register"]
34    #[inline(always)]
35    pub const fn enable(&self) -> &Enable {
36        &self.enable
37    }
38    #[doc = "0x10 - The Cascade Control Register. Controls the counter external enable signals"]
39    #[inline(always)]
40    pub const fn csd_ctrl(&self) -> &CsdCtrl {
41        &self.csd_ctrl
42    }
43    #[doc = "0x14 - Cascade Enable Selection"]
44    #[inline(always)]
45    pub const fn cascade0(&self) -> &Cascade0 {
46        &self.cascade0
47    }
48    #[doc = "0x18 - Cascade Enable Selection"]
49    #[inline(always)]
50    pub const fn cascade1(&self) -> &Cascade1 {
51        &self.cascade1
52    }
53    #[doc = "0x1c - Cascade Enable Selection"]
54    #[inline(always)]
55    pub const fn cascade2(&self) -> &Cascade2 {
56        &self.cascade2
57    }
58    #[doc = "0x20 - The Pulse Width Modulation ValueA"]
59    #[inline(always)]
60    pub const fn pwma_value(&self) -> &PwmaValue {
61        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(32).cast() }
62    }
63    #[doc = "0x20 - The Pulse Width Modulation Value"]
64    #[inline(always)]
65    pub const fn pwm_value(&self) -> &PwmValue {
66        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(32).cast() }
67    }
68    #[doc = "0x24 - The Pulse Width Modulation ValueB"]
69    #[inline(always)]
70    pub const fn pwmb_value(&self) -> &PwmbValue {
71        &self.pwmb_value
72    }
73    #[doc = "0x3fc - Peripheral ID Register"]
74    #[inline(always)]
75    pub const fn perid(&self) -> &Perid {
76        &self.perid
77    }
78}
79#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"]
80#[doc(alias = "CTRL")]
81pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
82#[doc = "Control Register"]
83pub mod ctrl;
84#[doc = "RST_VALUE (rw) register accessor: The value that counter start from after reaching 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rst_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rst_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rst_value`] module"]
85#[doc(alias = "RST_VALUE")]
86pub type RstValue = crate::Reg<rst_value::RstValueSpec>;
87#[doc = "The value that counter start from after reaching 0."]
88pub mod rst_value;
89#[doc = "CNT_VALUE (rw) register accessor: The current value of the counter\n\nYou can [`read`](crate::Reg::read) this register and get [`cnt_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cnt_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cnt_value`] module"]
90#[doc(alias = "CNT_VALUE")]
91pub type CntValue = crate::Reg<cnt_value::CntValueSpec>;
92#[doc = "The current value of the counter"]
93pub mod cnt_value;
94#[doc = "ENABLE (rw) register accessor: Alternate access to the Counter ENABLE bit in the CTRL Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`] module"]
95#[doc(alias = "ENABLE")]
96pub type Enable = crate::Reg<enable::EnableSpec>;
97#[doc = "Alternate access to the Counter ENABLE bit in the CTRL Register"]
98pub mod enable;
99#[doc = "CSD_CTRL (rw) register accessor: The Cascade Control Register. Controls the counter external enable signals\n\nYou can [`read`](crate::Reg::read) this register and get [`csd_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csd_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csd_ctrl`] module"]
100#[doc(alias = "CSD_CTRL")]
101pub type CsdCtrl = crate::Reg<csd_ctrl::CsdCtrlSpec>;
102#[doc = "The Cascade Control Register. Controls the counter external enable signals"]
103pub mod csd_ctrl;
104#[doc = "CASCADE0 (rw) register accessor: Cascade Enable Selection\n\nYou can [`read`](crate::Reg::read) this register and get [`cascade0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cascade0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cascade0`] module"]
105#[doc(alias = "CASCADE0")]
106pub type Cascade0 = crate::Reg<cascade0::Cascade0Spec>;
107#[doc = "Cascade Enable Selection"]
108pub mod cascade0;
109pub use cascade0 as cascade1;
110pub use cascade0 as cascade2;
111pub use Cascade0 as Cascade1;
112pub use Cascade0 as Cascade2;
113#[doc = "PWM_VALUE (rw) register accessor: The Pulse Width Modulation Value\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm_value`] module"]
114#[doc(alias = "PWM_VALUE")]
115pub type PwmValue = crate::Reg<pwm_value::PwmValueSpec>;
116#[doc = "The Pulse Width Modulation Value"]
117pub mod pwm_value;
118#[doc = "PWMA_VALUE (rw) register accessor: The Pulse Width Modulation ValueA\n\nYou can [`read`](crate::Reg::read) this register and get [`pwma_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwma_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwma_value`] module"]
119#[doc(alias = "PWMA_VALUE")]
120pub type PwmaValue = crate::Reg<pwma_value::PwmaValueSpec>;
121#[doc = "The Pulse Width Modulation ValueA"]
122pub mod pwma_value;
123#[doc = "PWMB_VALUE (rw) register accessor: The Pulse Width Modulation ValueB\n\nYou can [`read`](crate::Reg::read) this register and get [`pwmb_value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwmb_value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwmb_value`] module"]
124#[doc(alias = "PWMB_VALUE")]
125pub type PwmbValue = crate::Reg<pwmb_value::PwmbValueSpec>;
126#[doc = "The Pulse Width Modulation ValueB"]
127pub mod pwmb_value;
128#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"]
129#[doc(alias = "PERID")]
130pub type Perid = crate::Reg<perid::PeridSpec>;
131#[doc = "Peripheral ID Register"]
132pub mod perid;