1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 synd_data: SyndData,
5 synd_synd: SyndSynd,
6 synd_enc_32_44: SyndEnc32_44,
7 synd_check_32_44_data: SyndCheck32_44Data,
8 synd_check_32_44_synd: SyndCheck32_44Synd,
9 rom_trap_address: RomTrapAddress,
10 rom_trap_synd: RomTrapSynd,
11 ram_trap_addr0: RamTrapAddr0,
12 ram_trap_synd0: RamTrapSynd0,
13 ram_trap_addr1: RamTrapAddr1,
14 ram_trap_synd1: RamTrapSynd1,
15 _reserved11: [u8; 0xf4],
16 synd_enc_32_52: SyndEnc32_52,
17 synd_check_32_52_data: SyndCheck32_52Data,
18 synd_check_32_52_synd: SyndCheck32_52Synd,
19 _reserved14: [u8; 0x0ed0],
20 perid: Perid,
21}
22impl RegisterBlock {
23 #[doc = "0x00 - Data Register"]
24 #[inline(always)]
25 pub const fn synd_data(&self) -> &SyndData {
26 &self.synd_data
27 }
28 #[doc = "0x04 - Syndrome Data Register"]
29 #[inline(always)]
30 pub const fn synd_synd(&self) -> &SyndSynd {
31 &self.synd_synd
32 }
33 #[doc = "0x08 - EDAC Encode"]
34 #[inline(always)]
35 pub const fn synd_enc_32_44(&self) -> &SyndEnc32_44 {
36 &self.synd_enc_32_44
37 }
38 #[doc = "0x0c - EDAC Decode Data"]
39 #[inline(always)]
40 pub const fn synd_check_32_44_data(&self) -> &SyndCheck32_44Data {
41 &self.synd_check_32_44_data
42 }
43 #[doc = "0x10 - EDAC Decode Syndrome"]
44 #[inline(always)]
45 pub const fn synd_check_32_44_synd(&self) -> &SyndCheck32_44Synd {
46 &self.synd_check_32_44_synd
47 }
48 #[doc = "0x14 - ROM EDAC Trap Address"]
49 #[inline(always)]
50 pub const fn rom_trap_address(&self) -> &RomTrapAddress {
51 &self.rom_trap_address
52 }
53 #[doc = "0x18 - ROM EDAC Trap Syndrome"]
54 #[inline(always)]
55 pub const fn rom_trap_synd(&self) -> &RomTrapSynd {
56 &self.rom_trap_synd
57 }
58 #[doc = "0x1c - RAM0 EDAC Trap Address"]
59 #[inline(always)]
60 pub const fn ram_trap_addr0(&self) -> &RamTrapAddr0 {
61 &self.ram_trap_addr0
62 }
63 #[doc = "0x20 - RAM0 EDAC Trap Syndrome"]
64 #[inline(always)]
65 pub const fn ram_trap_synd0(&self) -> &RamTrapSynd0 {
66 &self.ram_trap_synd0
67 }
68 #[doc = "0x24 - RAM1 EDAC Trap Address"]
69 #[inline(always)]
70 pub const fn ram_trap_addr1(&self) -> &RamTrapAddr1 {
71 &self.ram_trap_addr1
72 }
73 #[doc = "0x28 - RAM1 EDAC Trap Syndrome"]
74 #[inline(always)]
75 pub const fn ram_trap_synd1(&self) -> &RamTrapSynd1 {
76 &self.ram_trap_synd1
77 }
78 #[doc = "0x120 - EDAC Encode"]
79 #[inline(always)]
80 pub const fn synd_enc_32_52(&self) -> &SyndEnc32_52 {
81 &self.synd_enc_32_52
82 }
83 #[doc = "0x124 - EDAC Decode Data"]
84 #[inline(always)]
85 pub const fn synd_check_32_52_data(&self) -> &SyndCheck32_52Data {
86 &self.synd_check_32_52_data
87 }
88 #[doc = "0x128 - EDAC Decode Syndrome"]
89 #[inline(always)]
90 pub const fn synd_check_32_52_synd(&self) -> &SyndCheck32_52Synd {
91 &self.synd_check_32_52_synd
92 }
93 #[doc = "0xffc - Peripheral ID Register"]
94 #[inline(always)]
95 pub const fn perid(&self) -> &Perid {
96 &self.perid
97 }
98}
99#[doc = "SYND_DATA (rw) register accessor: Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_data`] module"]
100#[doc(alias = "SYND_DATA")]
101pub type SyndData = crate::Reg<synd_data::SyndDataSpec>;
102#[doc = "Data Register"]
103pub mod synd_data;
104#[doc = "SYND_SYND (rw) register accessor: Syndrome Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_synd`] module"]
105#[doc(alias = "SYND_SYND")]
106pub type SyndSynd = crate::Reg<synd_synd::SyndSyndSpec>;
107#[doc = "Syndrome Data Register"]
108pub mod synd_synd;
109#[doc = "SYND_ENC_32_44 (rw) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_44::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synd_enc_32_44::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_44`] module"]
110#[doc(alias = "SYND_ENC_32_44")]
111pub type SyndEnc32_44 = crate::Reg<synd_enc_32_44::SyndEnc32_44Spec>;
112#[doc = "EDAC Encode"]
113pub mod synd_enc_32_44;
114#[doc = "SYND_CHECK_32_44_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_data`] module"]
115#[doc(alias = "SYND_CHECK_32_44_DATA")]
116pub type SyndCheck32_44Data = crate::Reg<synd_check_32_44_data::SyndCheck32_44DataSpec>;
117#[doc = "EDAC Decode Data"]
118pub mod synd_check_32_44_data;
119#[doc = "SYND_CHECK_32_44_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_44_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_44_synd`] module"]
120#[doc(alias = "SYND_CHECK_32_44_SYND")]
121pub type SyndCheck32_44Synd = crate::Reg<synd_check_32_44_synd::SyndCheck32_44SyndSpec>;
122#[doc = "EDAC Decode Syndrome"]
123pub mod synd_check_32_44_synd;
124#[doc = "ROM_TRAP_ADDRESS (rw) register accessor: ROM EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_address::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_address::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_address`] module"]
125#[doc(alias = "ROM_TRAP_ADDRESS")]
126pub type RomTrapAddress = crate::Reg<rom_trap_address::RomTrapAddressSpec>;
127#[doc = "ROM EDAC Trap Address"]
128pub mod rom_trap_address;
129#[doc = "ROM_TRAP_SYND (rw) register accessor: ROM EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`rom_trap_synd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rom_trap_synd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rom_trap_synd`] module"]
130#[doc(alias = "ROM_TRAP_SYND")]
131pub type RomTrapSynd = crate::Reg<rom_trap_synd::RomTrapSyndSpec>;
132#[doc = "ROM EDAC Trap Syndrome"]
133pub mod rom_trap_synd;
134#[doc = "RAM_TRAP_ADDR0 (rw) register accessor: RAM0 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr0`] module"]
135#[doc(alias = "RAM_TRAP_ADDR0")]
136pub type RamTrapAddr0 = crate::Reg<ram_trap_addr0::RamTrapAddr0Spec>;
137#[doc = "RAM0 EDAC Trap Address"]
138pub mod ram_trap_addr0;
139#[doc = "RAM_TRAP_SYND0 (rw) register accessor: RAM0 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd0`] module"]
140#[doc(alias = "RAM_TRAP_SYND0")]
141pub type RamTrapSynd0 = crate::Reg<ram_trap_synd0::RamTrapSynd0Spec>;
142#[doc = "RAM0 EDAC Trap Syndrome"]
143pub mod ram_trap_synd0;
144#[doc = "RAM_TRAP_ADDR1 (rw) register accessor: RAM1 EDAC Trap Address\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_addr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_addr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_addr1`] module"]
145#[doc(alias = "RAM_TRAP_ADDR1")]
146pub type RamTrapAddr1 = crate::Reg<ram_trap_addr1::RamTrapAddr1Spec>;
147#[doc = "RAM1 EDAC Trap Address"]
148pub mod ram_trap_addr1;
149#[doc = "RAM_TRAP_SYND1 (rw) register accessor: RAM1 EDAC Trap Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`ram_trap_synd1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram_trap_synd1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_trap_synd1`] module"]
150#[doc(alias = "RAM_TRAP_SYND1")]
151pub type RamTrapSynd1 = crate::Reg<ram_trap_synd1::RamTrapSynd1Spec>;
152#[doc = "RAM1 EDAC Trap Syndrome"]
153pub mod ram_trap_synd1;
154#[doc = "SYND_ENC_32_52 (r) register accessor: EDAC Encode\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_enc_32_52::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_enc_32_52`] module"]
155#[doc(alias = "SYND_ENC_32_52")]
156pub type SyndEnc32_52 = crate::Reg<synd_enc_32_52::SyndEnc32_52Spec>;
157#[doc = "EDAC Encode"]
158pub mod synd_enc_32_52;
159#[doc = "SYND_CHECK_32_52_DATA (r) register accessor: EDAC Decode Data\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_data::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_data`] module"]
160#[doc(alias = "SYND_CHECK_32_52_DATA")]
161pub type SyndCheck32_52Data = crate::Reg<synd_check_32_52_data::SyndCheck32_52DataSpec>;
162#[doc = "EDAC Decode Data"]
163pub mod synd_check_32_52_data;
164#[doc = "SYND_CHECK_32_52_SYND (r) register accessor: EDAC Decode Syndrome\n\nYou can [`read`](crate::Reg::read) this register and get [`synd_check_32_52_synd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synd_check_32_52_synd`] module"]
165#[doc(alias = "SYND_CHECK_32_52_SYND")]
166pub type SyndCheck32_52Synd = crate::Reg<synd_check_32_52_synd::SyndCheck32_52SyndSpec>;
167#[doc = "EDAC Decode Syndrome"]
168pub mod synd_check_32_52_synd;
169#[doc = "PERID (r) register accessor: Peripheral ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`perid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@perid`] module"]
170#[doc(alias = "PERID")]
171pub type Perid = crate::Reg<perid::PeridSpec>;
172#[doc = "Peripheral ID Register"]
173pub mod perid;