1#[doc = "Register `S0_CTRL` reader"]
2pub type R = crate::R<S0CtrlSpec>;
3#[doc = "Register `S0_CTRL` writer"]
4pub type W = crate::W<S0CtrlSpec>;
5#[doc = "Field `CLKENABLED` reader - I2C Enabled"]
6pub type ClkenabledR = crate::BitReader;
7#[doc = "Field `CLKENABLED` writer - I2C Enabled"]
8pub type ClkenabledW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ENABLED` reader - I2C Activated"]
10pub type EnabledR = crate::BitReader;
11#[doc = "Field `ENABLED` writer - I2C Activated"]
12pub type EnabledW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `ENABLE` reader - I2C Active"]
14pub type EnableR = crate::BitReader;
15#[doc = "Field `ENABLE` writer - I2C Active"]
16pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `TXFEMD` reader - TX FIFIO Empty Mode"]
18pub type TxfemdR = crate::BitReader;
19#[doc = "Field `TXFEMD` writer - TX FIFIO Empty Mode"]
20pub type TxfemdW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `RXFFMD` reader - RX FIFO Full Mode"]
22pub type RxffmdR = crate::BitReader;
23#[doc = "Field `RXFFMD` writer - RX FIFO Full Mode"]
24pub type RxffmdW<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26 #[doc = "Bit 0 - I2C Enabled"]
27 #[inline(always)]
28 pub fn clkenabled(&self) -> ClkenabledR {
29 ClkenabledR::new((self.bits & 1) != 0)
30 }
31 #[doc = "Bit 1 - I2C Activated"]
32 #[inline(always)]
33 pub fn enabled(&self) -> EnabledR {
34 EnabledR::new(((self.bits >> 1) & 1) != 0)
35 }
36 #[doc = "Bit 2 - I2C Active"]
37 #[inline(always)]
38 pub fn enable(&self) -> EnableR {
39 EnableR::new(((self.bits >> 2) & 1) != 0)
40 }
41 #[doc = "Bit 3 - TX FIFIO Empty Mode"]
42 #[inline(always)]
43 pub fn txfemd(&self) -> TxfemdR {
44 TxfemdR::new(((self.bits >> 3) & 1) != 0)
45 }
46 #[doc = "Bit 4 - RX FIFO Full Mode"]
47 #[inline(always)]
48 pub fn rxffmd(&self) -> RxffmdR {
49 RxffmdR::new(((self.bits >> 4) & 1) != 0)
50 }
51}
52impl W {
53 #[doc = "Bit 0 - I2C Enabled"]
54 #[inline(always)]
55 pub fn clkenabled(&mut self) -> ClkenabledW<'_, S0CtrlSpec> {
56 ClkenabledW::new(self, 0)
57 }
58 #[doc = "Bit 1 - I2C Activated"]
59 #[inline(always)]
60 pub fn enabled(&mut self) -> EnabledW<'_, S0CtrlSpec> {
61 EnabledW::new(self, 1)
62 }
63 #[doc = "Bit 2 - I2C Active"]
64 #[inline(always)]
65 pub fn enable(&mut self) -> EnableW<'_, S0CtrlSpec> {
66 EnableW::new(self, 2)
67 }
68 #[doc = "Bit 3 - TX FIFIO Empty Mode"]
69 #[inline(always)]
70 pub fn txfemd(&mut self) -> TxfemdW<'_, S0CtrlSpec> {
71 TxfemdW::new(self, 3)
72 }
73 #[doc = "Bit 4 - RX FIFO Full Mode"]
74 #[inline(always)]
75 pub fn rxffmd(&mut self) -> RxffmdW<'_, S0CtrlSpec> {
76 RxffmdW::new(self, 4)
77 }
78}
79#[doc = "Slave Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`s0_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`s0_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct S0CtrlSpec;
81impl crate::RegisterSpec for S0CtrlSpec {
82 type Ux = u32;
83}
84#[doc = "`read()` method returns [`s0_ctrl::R`](R) reader structure"]
85impl crate::Readable for S0CtrlSpec {}
86#[doc = "`write(|w| ..)` method takes [`s0_ctrl::W`](W) writer structure"]
87impl crate::Writable for S0CtrlSpec {
88 type Safety = crate::Unsafe;
89}
90#[doc = "`reset()` method sets S0_CTRL to value 0"]
91impl crate::Resettable for S0CtrlSpec {}